| Message ID | 20181105084653.26597-2-xiaowei.bao@nxp.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [PATCHv2,1/6] arm64: dts: Add the status property disable PCIe | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | next/apply_patch Successfully applied |
| snowpatch_ozlabs/checkpatch | success | Test checkpatch on branch next |
On Mon, Nov 05, 2018 at 04:46:49PM +0800, Xiaowei Bao wrote: > Add the status property disable the PCIe, the property will be enable > by bootloader. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Applied, thanks.
Hi Shanwn, Thanks a lot. Best regards Xiaowei -----Original Message----- From: Shawn Guo <shawnguo@kernel.org> Sent: 2018年11月16日 10:51 To: Xiaowei Bao <xiaowei.bao@nxp.com> Cc: bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com; Leo Li <leoyang.li@nxp.com>; kishon@ti.com; lorenzo.pieralisi@arm.com; arnd@arndb.de; gregkh@linuxfoundation.org; M.h. Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy Zang <roy.zang@nxp.com>; kstewart@linuxfoundation.org; cyrille.pitchen@free-electrons.com; pombredanne@nexb.com; shawn.lin@rock-chips.com; niklas.cassel@axis.com; linux-pci@vger.kernel.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCHv2 2/6] ARM: dts: ls1021a: Add the status property disable PCIe On Mon, Nov 05, 2018 at 04:46:49PM +0800, Xiaowei Bao wrote: > Add the status property disable the PCIe, the property will be enable > by bootloader. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Applied, thanks.
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index bdd6e66..b769e0e 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -736,6 +736,7 @@ <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; }; pcie@3500000 { @@ -759,6 +760,7 @@ <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; }; can0: can@2a70000 {
Add the status property disable the PCIe, the property will be enable by bootloader. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- v2: - no change arch/arm/boot/dts/ls1021a.dtsi | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)