| Message ID | 20181101214648.29432-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | LSE atomics out-of-line | expand |
Ping. On 11/1/18 10:46 PM, Richard Henderson wrote: > From: Richard Henderson <rth@twiddle.net> > > Changes since v2: > * Committed half of the patch set. > * Split inline TImode support from out-of-line patches. > * Removed the ST<OP> out-of-line functions, to match inline. > * Moved the out-of-line functions to assembly. > > What I have not done, but is now a possibility, is to use a custom > calling convention for the out-of-line routines. I now only clobber > 2 (or 3, for TImode) temp regs and set a return value. > > > r~ > > > Richard Henderson (6): > aarch64: Extend %R for integer registers > aarch64: Implement TImode compare-and-swap > aarch64: Tidy aarch64_split_compare_and_swap > aarch64: Add out-of-line functions for LSE atomics > aarch64: Implement -matomic-ool > Enable -matomic-ool by default > > gcc/config/aarch64/aarch64-protos.h | 13 + > gcc/common/config/aarch64/aarch64-common.c | 6 +- > gcc/config/aarch64/aarch64.c | 211 ++++++++++++---- > .../atomic-comp-swap-release-acquire.c | 2 +- > .../gcc.target/aarch64/atomic-op-acq_rel.c | 2 +- > .../gcc.target/aarch64/atomic-op-acquire.c | 2 +- > .../gcc.target/aarch64/atomic-op-char.c | 2 +- > .../gcc.target/aarch64/atomic-op-consume.c | 2 +- > .../gcc.target/aarch64/atomic-op-imm.c | 2 +- > .../gcc.target/aarch64/atomic-op-int.c | 2 +- > .../gcc.target/aarch64/atomic-op-long.c | 2 +- > .../gcc.target/aarch64/atomic-op-relaxed.c | 2 +- > .../gcc.target/aarch64/atomic-op-release.c | 2 +- > .../gcc.target/aarch64/atomic-op-seq_cst.c | 2 +- > .../gcc.target/aarch64/atomic-op-short.c | 2 +- > .../aarch64/atomic_cmp_exchange_zero_reg_1.c | 2 +- > .../atomic_cmp_exchange_zero_strong_1.c | 2 +- > .../gcc.target/aarch64/sync-comp-swap.c | 2 +- > .../gcc.target/aarch64/sync-op-acquire.c | 2 +- > .../gcc.target/aarch64/sync-op-full.c | 2 +- > libgcc/config/aarch64/lse-init.c | 45 ++++ > gcc/config/aarch64/aarch64.opt | 4 + > gcc/config/aarch64/atomics.md | 185 +++++++++++++- > gcc/config/aarch64/iterators.md | 3 + > gcc/doc/invoke.texi | 14 +- > libgcc/config.host | 4 + > libgcc/config/aarch64/lse.S | 238 ++++++++++++++++++ > libgcc/config/aarch64/t-lse | 44 ++++ > 28 files changed, 717 insertions(+), 84 deletions(-) > create mode 100644 libgcc/config/aarch64/lse-init.c > create mode 100644 libgcc/config/aarch64/lse.S > create mode 100644 libgcc/config/aarch64/t-lse >
Hi Richard, On 11/1/18 9:46 PM, Richard Henderson wrote: > From: Richard Henderson <rth@twiddle.net> > > Changes since v2: > * Committed half of the patch set. > * Split inline TImode support from out-of-line patches. > * Removed the ST<OP> out-of-line functions, to match inline. > * Moved the out-of-line functions to assembly. > > What I have not done, but is now a possibility, is to use a custom > calling convention for the out-of-line routines. I now only clobber > 2 (or 3, for TImode) temp regs and set a return value. > I think this patch series would be great to have for GCC 10! I've rebased them on current trunk and fixed up a couple of minor conflicts in my local tree. After that, I've encountered a couple of issues with building a compiler with these patches. I'll respond to the individual patches that I think cause the trouble. Thanks, Kyrill > > r~ > > > Richard Henderson (6): > aarch64: Extend %R for integer registers > aarch64: Implement TImode compare-and-swap > aarch64: Tidy aarch64_split_compare_and_swap > aarch64: Add out-of-line functions for LSE atomics > aarch64: Implement -matomic-ool > Enable -matomic-ool by default > > gcc/config/aarch64/aarch64-protos.h | 13 + > gcc/common/config/aarch64/aarch64-common.c | 6 +- > gcc/config/aarch64/aarch64.c | 211 ++++++++++++---- > .../atomic-comp-swap-release-acquire.c | 2 +- > .../gcc.target/aarch64/atomic-op-acq_rel.c | 2 +- > .../gcc.target/aarch64/atomic-op-acquire.c | 2 +- > .../gcc.target/aarch64/atomic-op-char.c | 2 +- > .../gcc.target/aarch64/atomic-op-consume.c | 2 +- > .../gcc.target/aarch64/atomic-op-imm.c | 2 +- > .../gcc.target/aarch64/atomic-op-int.c | 2 +- > .../gcc.target/aarch64/atomic-op-long.c | 2 +- > .../gcc.target/aarch64/atomic-op-relaxed.c | 2 +- > .../gcc.target/aarch64/atomic-op-release.c | 2 +- > .../gcc.target/aarch64/atomic-op-seq_cst.c | 2 +- > .../gcc.target/aarch64/atomic-op-short.c | 2 +- > .../aarch64/atomic_cmp_exchange_zero_reg_1.c | 2 +- > .../atomic_cmp_exchange_zero_strong_1.c | 2 +- > .../gcc.target/aarch64/sync-comp-swap.c | 2 +- > .../gcc.target/aarch64/sync-op-acquire.c | 2 +- > .../gcc.target/aarch64/sync-op-full.c | 2 +- > libgcc/config/aarch64/lse-init.c | 45 ++++ > gcc/config/aarch64/aarch64.opt | 4 + > gcc/config/aarch64/atomics.md | 185 +++++++++++++- > gcc/config/aarch64/iterators.md | 3 + > gcc/doc/invoke.texi | 14 +- > libgcc/config.host | 4 + > libgcc/config/aarch64/lse.S | 238 ++++++++++++++++++ > libgcc/config/aarch64/t-lse | 44 ++++ > 28 files changed, 717 insertions(+), 84 deletions(-) > create mode 100644 libgcc/config/aarch64/lse-init.c > create mode 100644 libgcc/config/aarch64/lse.S > create mode 100644 libgcc/config/aarch64/t-lse > > -- > 2.17.2 >
From: Richard Henderson <rth@twiddle.net> Changes since v2: * Committed half of the patch set. * Split inline TImode support from out-of-line patches. * Removed the ST<OP> out-of-line functions, to match inline. * Moved the out-of-line functions to assembly. What I have not done, but is now a possibility, is to use a custom calling convention for the out-of-line routines. I now only clobber 2 (or 3, for TImode) temp regs and set a return value. r~ Richard Henderson (6): aarch64: Extend %R for integer registers aarch64: Implement TImode compare-and-swap aarch64: Tidy aarch64_split_compare_and_swap aarch64: Add out-of-line functions for LSE atomics aarch64: Implement -matomic-ool Enable -matomic-ool by default gcc/config/aarch64/aarch64-protos.h | 13 + gcc/common/config/aarch64/aarch64-common.c | 6 +- gcc/config/aarch64/aarch64.c | 211 ++++++++++++---- .../atomic-comp-swap-release-acquire.c | 2 +- .../gcc.target/aarch64/atomic-op-acq_rel.c | 2 +- .../gcc.target/aarch64/atomic-op-acquire.c | 2 +- .../gcc.target/aarch64/atomic-op-char.c | 2 +- .../gcc.target/aarch64/atomic-op-consume.c | 2 +- .../gcc.target/aarch64/atomic-op-imm.c | 2 +- .../gcc.target/aarch64/atomic-op-int.c | 2 +- .../gcc.target/aarch64/atomic-op-long.c | 2 +- .../gcc.target/aarch64/atomic-op-relaxed.c | 2 +- .../gcc.target/aarch64/atomic-op-release.c | 2 +- .../gcc.target/aarch64/atomic-op-seq_cst.c | 2 +- .../gcc.target/aarch64/atomic-op-short.c | 2 +- .../aarch64/atomic_cmp_exchange_zero_reg_1.c | 2 +- .../atomic_cmp_exchange_zero_strong_1.c | 2 +- .../gcc.target/aarch64/sync-comp-swap.c | 2 +- .../gcc.target/aarch64/sync-op-acquire.c | 2 +- .../gcc.target/aarch64/sync-op-full.c | 2 +- libgcc/config/aarch64/lse-init.c | 45 ++++ gcc/config/aarch64/aarch64.opt | 4 + gcc/config/aarch64/atomics.md | 185 +++++++++++++- gcc/config/aarch64/iterators.md | 3 + gcc/doc/invoke.texi | 14 +- libgcc/config.host | 4 + libgcc/config/aarch64/lse.S | 238 ++++++++++++++++++ libgcc/config/aarch64/t-lse | 44 ++++ 28 files changed, 717 insertions(+), 84 deletions(-) create mode 100644 libgcc/config/aarch64/lse-init.c create mode 100644 libgcc/config/aarch64/lse.S create mode 100644 libgcc/config/aarch64/t-lse