Message ID | 1296909810-14177-2-git-send-email-linux@bohmer.net |
---|---|
State | Superseded |
Delegated to: | Reinhard Meyer |
Headers | show |
Hi Reinhard, 2011/2/5 Remy Bohmer <linux@bohmer.net>: > Also removes CONFIG_AT91_LEGACY related stuff. > > Signed-off-by: Remy Bohmer <linux@bohmer.net> > --- > V1: This patch contains everything to make the boards work again on > the current changes in the u-boot-atmel.git tree. > It requires the mainstream fixes to be applied first > ([PATCH 1/2 V3] at91sam9261ek: make operational again) > > This patch-series can be pulled from: > git://git.denx.de/u-boot-usb.git -> fix-at91sam9261ek > > Makefile | 23 ---- > arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c | 31 +++-- > arch/arm/cpu/arm926ejs/at91/led.c | 1 - > arch/arm/include/asm/arch-at91/at91_matrix.h | 17 ++- > arch/arm/include/asm/arch-at91/at91sam9261.h | 1 + > .../arm/include/asm/arch-at91/at91sam9261_matrix.h | 64 --------- > board/atmel/at91sam9261ek/at91sam9261ek.c | 140 +++++++++++--------- > board/atmel/at91sam9261ek/led.c | 8 +- > boards.cfg | 6 + > doc/README.at91 | 3 +- > include/configs/at91sam9261ek.h | 27 ++-- > 11 files changed, 127 insertions(+), 194 deletions(-) > delete mode 100644 arch/arm/include/asm/arch-at91/at91sam9261_matrix.h This patch is waiting for your review comments for quite some time already. Do you have any comments on it? Kind regards, Remy
Dear Remy Bohmer, some more comments on that patchset. Am 05.02.2011 um 13:43 schrieb Remy Bohmer: > Also removes CONFIG_AT91_LEGACY related stuff. > > Signed-off-by: Remy Bohmer <linux@bohmer.net> > --- > V1: This patch contains everything to make the boards work again on > the current changes in the u-boot-atmel.git tree. > It requires the mainstream fixes to be applied first > ([PATCH 1/2 V3] at91sam9261ek: make operational again) > > This patch-series can be pulled from: > git://git.denx.de/u-boot-usb.git -> fix-at91sam9261ek > > Makefile | 23 ---- > arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c | 31 +++-- > arch/arm/cpu/arm926ejs/at91/led.c | 1 - > arch/arm/include/asm/arch-at91/at91_matrix.h | 17 ++- > arch/arm/include/asm/arch-at91/at91sam9261.h | 1 + > .../arm/include/asm/arch-at91/at91sam9261_matrix.h | 64 --------- > board/atmel/at91sam9261ek/at91sam9261ek.c | 140 +++++++++++--------- > board/atmel/at91sam9261ek/led.c | 8 +- > boards.cfg | 6 + > doc/README.at91 | 3 +- > include/configs/at91sam9261ek.h | 27 ++-- > 11 files changed, 127 insertions(+), 194 deletions(-) > delete mode 100644 arch/arm/include/asm/arch-at91/at91sam9261_matrix.h > > diff --git a/Makefile b/Makefile > index 770fb0d..e934b75 100644 Please merge those changes to Makefile and boards.cfg into Patch 1/2. > --- a/Makefile > +++ b/Makefile > @@ -759,29 +759,6 @@ CPUAT91_config : unconfig > ## ARM926EJ-S Systems > ######################################################################### > > -at91sam9261ek_nandflash_config \ > -at91sam9261ek_dataflash_cs0_config \ > -at91sam9261ek_dataflash_cs3_config \ > -at91sam9261ek_config \ > -at91sam9g10ek_nandflash_config \ > -at91sam9g10ek_dataflash_cs0_config \ > -at91sam9g10ek_dataflash_cs3_config \ > -at91sam9g10ek_config : unconfig > - @mkdir -p $(obj)include > - @if [ "$(findstring 9g10,$@)" ] ; then \ > - echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \ > - else \ > - echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \ > - fi; > - @if [ "$(findstring _nandflash,$@)" ] ; then \ > - echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ > - elif [ "$(findstring dataflash_cs0,$@)" ] ; then \ > - echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \ > - else \ > - echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \ > - fi; > - @$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91 > - > at91sam9263ek_norflash_config \ > at91sam9263ek_norflash_boot_config \ > at91sam9263ek_nandflash_config \ > diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c > index b4353ef..0e2c196 100644 those changes should go into u-boot-atmel/rework2011xxx branch > --- a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c > +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c > @@ -23,45 +23,46 @@ > */ > > #include <common.h> > +#include <asm/io.h> > +#include <asm/arch/at91sam9261.h> > #include <asm/arch/at91_common.h> > #include <asm/arch/at91_pmc.h> > #include <asm/arch/gpio.h> > -#include <asm/arch/io.h> > > void at91_serial0_hw_init(void) > { > - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; > + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; > > at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */ > at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */ > - writel(1 << AT91SAM9261_ID_US0, &pmc->pcer); > + writel(1 << ATMEL_ID_USART0, &pmc->pcer); > } > > void at91_serial1_hw_init(void) > { > - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; > + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; > > at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */ > at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */ > - writel(1 << AT91SAM9261_ID_US1, &pmc->pcer); > + writel(1 << ATMEL_ID_USART1, &pmc->pcer); > } > > void at91_serial2_hw_init(void) > { > - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; > + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; > > at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */ > at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */ > - writel(1 << AT91SAM9261_ID_US2, &pmc->pcer); > + writel(1 << ATMEL_ID_USART2, &pmc->pcer); > } > > -void at91_serial3_hw_init(void) > +void at91_seriald_hw_init(void) > { > - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; > + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; > > at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */ > at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ > - writel(1 << AT91_ID_SYS, &pmc->pcer); > + writel(1 << ATMEL_ID_SYS, &pmc->pcer); > } > > void at91_serial_hw_init(void) > @@ -79,21 +80,21 @@ void at91_serial_hw_init(void) > #endif > > #ifdef CONFIG_USART3 /* DBGU */ > - at91_serial3_hw_init(); > + at91_seriald_hw_init(); > #endif > } > > #ifdef CONFIG_HAS_DATAFLASH > void at91_spi0_hw_init(unsigned long cs_mask) > { > - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; > + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; > > at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ > at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ > at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */ > > /* Enable clock */ > - writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer); > + writel(1 << ATMEL_ID_SPI0, &pmc->pcer); > > if (cs_mask & (1 << 0)) { > at91_set_a_periph(AT91_PIO_PORTA, 3, 1); > @@ -123,14 +124,14 @@ void at91_spi0_hw_init(unsigned long cs_mask) > > void at91_spi1_hw_init(unsigned long cs_mask) > { > - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; > + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; > > at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */ > at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */ > at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */ > > /* Enable clock */ > - writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer); > + writel(1 << ATMEL_ID_SPI1, &pmc->pcer); > > if (cs_mask & (1 << 0)) { > at91_set_a_periph(AT91_PIO_PORTB, 28, 1); > diff --git a/arch/arm/cpu/arm926ejs/at91/led.c b/arch/arm/cpu/arm926ejs/at91/led.c > index 6bcfa7f..e5f145a 100644 > --- a/arch/arm/cpu/arm926ejs/at91/led.c > +++ b/arch/arm/cpu/arm926ejs/at91/led.c > @@ -24,7 +24,6 @@ > > #include <common.h> > #include <asm/io.h> > -#include <asm/arch/at91_pmc.h> > #include <asm/arch/at91_pio.h> > #include <asm/arch/gpio.h> > > diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h > index f99b1d4..4cd7229 100644 > --- a/arch/arm/include/asm/arch-at91/at91_matrix.h > +++ b/arch/arm/include/asm/arch-at91/at91_matrix.h > @@ -27,7 +27,7 @@ > > #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) > #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x11C) > -#elif defined(CONFIG_AT91SAM9261) > +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) > #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x30) > #elif defined(CONFIG_AT91SAM9263) > #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x120) > @@ -43,7 +43,7 @@ > #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) > #define AT91_MATRIX_MASTERS 6 > #define AT91_MATRIX_SLAVES 5 > -#elif defined(CONFIG_AT91SAM9261) > +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) > #define AT91_MATRIX_MASTERS 1 > #define AT91_MATRIX_SLAVES 5 > #elif defined(CONFIG_AT91SAM9263) > @@ -63,7 +63,7 @@ typedef struct at91_priority { > > typedef struct at91_matrix { > u32 mcfg[AT91_MATRIX_MASTERS]; > -#if defined(CONFIG_AT91SAM9261) > +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) > u32 scfg[AT91_MATRIX_SLAVES]; > u32 res61_1[3]; > u32 tcr; > @@ -113,7 +113,7 @@ typedef struct at91_matrix { > > #define AT91_MATRIX_CSA_EBI1_CS2A 0x00000008 > > -#if defined CONFIG_AT91SAM9261 > +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) > /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ > #define AT91_MATRIX_MCFG_RCB0 (1 << 0) > /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ > @@ -143,7 +143,8 @@ typedef struct at91_matrix { > /* Fixed Index of Default Master */ > #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) > #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18) > -#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) > +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) || \ > + defined(CONFIG_AT91SAM9G10) > #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18) > #endif > > @@ -151,7 +152,7 @@ typedef struct at91_matrix { > #if defined(CONFIG_AT91SAM9G45) > #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0) > #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ > - defined(CONFIG_AT91SAM9263) > + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G10) > #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0xff) << 0) > #endif > > @@ -207,7 +208,7 @@ typedef struct at91_matrix { > #define AT91_MATRIX_TCMR_DTCM_16 0x00000050 > #define AT91_MATRIX_TCMR_DTCM_32 0x00000060 > #endif > -#if defined(CONFIG_AT91SAM9261) > +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) > /* Size of ITCM enabled memory block */ > #define AT91_MATRIX_TCMR_ITCM_0 0x00000000 > #define AT91_MATRIX_TCMR_ITCM_16 0x00000005 > @@ -235,7 +236,7 @@ typedef struct at91_matrix { > #endif > > /* USB Pad Pull-Up Control Register */ > -#if defined(CONFIG_AT91SAM9261) > +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) > #define AT91_MATRIX_USBPUCR_PUON 0x40000000 > #endif > > diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h > index f8048d5..4bf7d8a 100644 > --- a/arch/arm/include/asm/arch-at91/at91sam9261.h > +++ b/arch/arm/include/asm/arch-at91/at91sam9261.h > @@ -125,6 +125,7 @@ > * Other misc defines > */ > #define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */ > +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP > > /* > * SoC specific defines > diff --git a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h > deleted file mode 100644 > index e2bfc4b..0000000 > --- a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h > +++ /dev/null > @@ -1,64 +0,0 @@ > -/* > - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h] > - * > - * Copyright (C) 2007 Atmel Corporation. > - * > - * Memory Controllers (MATRIX, EBI) - System peripherals registers. > - * Based on AT91SAM9261 datasheet revision D. > - * > - * This program is free software; you can redistribute it and/or modify > - * it under the terms of the GNU General Public License as published by > - * the Free Software Foundation; either version 2 of the License, or > - * (at your option) any later version. > - */ > - > -#ifndef AT91SAM9261_MATRIX_H > -#define AT91SAM9261_MATRIX_H > - > -#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ > -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ > -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ > - > -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ > -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ > -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ > -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ > -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ > -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ > -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ > -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) > -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) > -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) > -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ > - > -#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ > -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ > -#define AT91_MATRIX_ITCM_0 (0 << 0) > -#define AT91_MATRIX_ITCM_16 (5 << 0) > -#define AT91_MATRIX_ITCM_32 (6 << 0) > -#define AT91_MATRIX_ITCM_64 (7 << 0) > -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ > -#define AT91_MATRIX_DTCM_0 (0 << 4) > -#define AT91_MATRIX_DTCM_16 (5 << 4) > -#define AT91_MATRIX_DTCM_32 (6 << 4) > -#define AT91_MATRIX_DTCM_64 (7 << 4) > - > -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ > -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ > -#define AT91_MATRIX_CS1A_SMC (0 << 1) > -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) > -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ > -#define AT91_MATRIX_CS3A_SMC (0 << 3) > -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) > -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ > -#define AT91_MATRIX_CS4A_SMC (0 << 4) > -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) > -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ > -#define AT91_MATRIX_CS5A_SMC (0 << 5) > -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) > -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ > - > -#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ > -#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ > - > -#endif > diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c > index 25c181e..da2c2c6 100644 > --- a/board/atmel/at91sam9261ek/at91sam9261ek.c > +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c > @@ -23,19 +23,16 @@ > */ > > #include <common.h> > -#include <asm/arch/at91sam9261.h> > -#include <asm/arch/at91sam9261_matrix.h> > +#include <asm/io.h> > +#include <asm/arch/at91_matrix.h> > #include <asm/arch/at91sam9_smc.h> > #include <asm/arch/at91_common.h> > #include <asm/arch/at91_pmc.h> > -#include <asm/arch/at91_rstc.h> > #include <asm/arch/clk.h> > #include <asm/arch/gpio.h> > -#include <asm/arch/io.h> > #include <lcd.h> > #include <atmel_lcdc.h> > #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) > -#include <net.h> > #include <netdev.h> > #endif > > @@ -49,44 +46,43 @@ DECLARE_GLOBAL_DATA_PTR; > #ifdef CONFIG_CMD_NAND > static void at91sam9261ek_nand_hw_init(void) > { > + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; > + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; > unsigned long csa; > > /* Enable CS3 */ > - csa = at91_sys_read(AT91_MATRIX_EBICSA); > - at91_sys_write(AT91_MATRIX_EBICSA, > - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); > + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; > + writel(csa, &matrix->csa); > > /* Configure SMC CS3 for NAND/SmartMedia */ > #ifdef CONFIG_AT91SAM9G10EK > - at91_sys_write(AT91_SMC_SETUP(3), > - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | > - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); > - at91_sys_write(AT91_SMC_PULSE(3), > - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) | > - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7)); > - at91_sys_write(AT91_SMC_CYCLE(3), > - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); > + writel( AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | > + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), > + &smc->cs[3].setup); > + writel( AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(7) | > + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(7), > + &smc->cs[3].pulse); > + writel( AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), > + &smc->cs[3].cycle); > #else > - at91_sys_write(AT91_SMC_SETUP(3), > - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | > - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); > - at91_sys_write(AT91_SMC_PULSE(3), > - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | > - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); > - at91_sys_write(AT91_SMC_CYCLE(3), > - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); > + writel( AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | > + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), > + &smc->cs[3].setup); > + writel( AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | > + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), > + &smc->cs[3].pulse); > + writel( AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), > + &smc->cs[3].cycle); > #endif > - at91_sys_write(AT91_SMC_MODE(3), > - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | > - AT91_SMC_EXNWMODE_DISABLE | > + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | > + AT91_SMC_MODE_EXNW_DISABLE | > #ifdef CONFIG_SYS_NAND_DBW_16 > - AT91_SMC_DBW_16 | > + AT91_SMC_MODE_DBW_16 | > #else /* CONFIG_SYS_NAND_DBW_8 */ > - AT91_SMC_DBW_8 | > + AT91_SMC_MODE_DBW_8 | > #endif > - AT91_SMC_TDF_(2)); > - > - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); > + AT91_SMC_MODE_TDF_CYCLE(2), > + &smc->cs[3].mode); > > /* Configure RDY/BSY */ > at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); > @@ -102,35 +98,37 @@ static void at91sam9261ek_nand_hw_init(void) > #ifdef CONFIG_DRIVER_DM9000 > static void at91sam9261ek_dm9000_hw_init(void) > { > + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; > + > /* Configure SMC CS2 for DM9000 */ > #ifdef CONFIG_AT91SAM9G10EK > - at91_sys_write(AT91_SMC_SETUP(2), > - AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) | > - AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0)); > - at91_sys_write(AT91_SMC_PULSE(2), > - AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) | > - AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8)); > - at91_sys_write(AT91_SMC_CYCLE(2), > - AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20)); > - at91_sys_write(AT91_SMC_MODE(2), > - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | > - AT91_SMC_EXNWMODE_DISABLE | > - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | > - AT91_SMC_TDF_(1)); > + writel( AT91_SMC_SETUP_NWE(3) | AT91_SMC_SETUP_NCS_WR(0) | > + AT91_SMC_SETUP_NRD(3) | AT91_SMC_SETUP_NCS_RD(0), > + &smc->cs[2].setup); > + writel( AT91_SMC_PULSE_NWE(6) | AT91_SMC_PULSE_NCS_WR(8) | > + AT91_SMC_PULSE_NRD(6) | AT91_SMC_PULSE_NCS_RD(8), > + &smc->cs[2].pulse); > + writel( AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20), > + &smc->cs[2].cycle); > + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | > + AT91_SMC_MODE_EXNW_DISABLE | > + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | > + AT91_SMC_MODE_TDF_CYCLE(1), > + &smc->cs[2].mode); > #else > - at91_sys_write(AT91_SMC_SETUP(2), > - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | > - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); > - at91_sys_write(AT91_SMC_PULSE(2), > - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | > - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); > - at91_sys_write(AT91_SMC_CYCLE(2), > - AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); > - at91_sys_write(AT91_SMC_MODE(2), > - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | > - AT91_SMC_EXNWMODE_DISABLE | > - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | > - AT91_SMC_TDF_(1)); > + writel( AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | > + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), > + &smc->cs[2].setup); > + writel( AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | > + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), > + &smc->cs[2].pulse); > + writel( AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), > + &smc->cs[2].cycle); > + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | > + AT91_SMC_MODE_EXNW_DISABLE | > + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | > + AT91_SMC_MODE_TDF_CYCLE(1), > + &smc->cs[2].mode); > #endif > > /* Configure Reset signal as output */ > @@ -156,7 +154,7 @@ vidinfo_t panel_info = { > vl_vsync_len: 1, > vl_upper_margin:1, > vl_lower_margin:0, > - mmio: AT91SAM9261_LCDC_BASE, > + mmio: ATMEL_BASE_LCDC, > }; > > void lcd_enable(void) > @@ -171,6 +169,8 @@ void lcd_disable(void) > > static void at91sam9261ek_lcd_hw_init(void) > { > + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; > + > at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ > at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ > at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ > @@ -194,12 +194,12 @@ static void at91sam9261ek_lcd_hw_init(void) > at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ > at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ > > - at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); > + writel(AT91_PMC_HCK1, &pmc->scer); > > #ifdef CONFIG_AT91SAM9G10EK > gd->fb_base = CONFIG_AT91SAM9G10_LCD_BASE; > #else > - gd->fb_base = AT91SAM9261_SRAM_BASE; > + gd->fb_base = ATMEL_BASE_SRAM; > #endif > } > > @@ -217,7 +217,7 @@ void lcd_show_board_info(void) > lcd_printf ("(C) 2008 ATMEL Corp\n"); > lcd_printf ("at91support@atmel.com\n"); > lcd_printf ("%s CPU at %s MHz\n", > - CONFIG_SYS_AT91_CPU_NAME, > + ATMEL_CPU_NAME, > strmhz(temp, get_cpu_clk_rate())); > > dram_size = 0; > @@ -233,6 +233,21 @@ void lcd_show_board_info(void) > #endif /* CONFIG_LCD_INFO */ > #endif > > +int board_early_init_f(void) > +{ > + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; > + > + /* Enable clocks for all PIOs */ > + writel( (1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | > + (1 << ATMEL_ID_PIOC), > + &pmc->pcer); > + > + /* Configure DBGU pins, the bootstrap code might skip it */ > + at91_seriald_hw_init(); > + > + return 0; > +} > + > int board_init(void) > { > /* Enable Ctrlc */ > @@ -248,7 +263,6 @@ int board_init(void) > /* adress of boot parameters */ > gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; > > - at91_serial_hw_init(); > #ifdef CONFIG_CMD_NAND > at91sam9261ek_nand_hw_init(); > #endif > diff --git a/board/atmel/at91sam9261ek/led.c b/board/atmel/at91sam9261ek/led.c > index 5d1c5f2..1c524f3 100644 > --- a/board/atmel/at91sam9261ek/led.c > +++ b/board/atmel/at91sam9261ek/led.c > @@ -23,16 +23,12 @@ > */ > > #include <common.h> > -#include <asm/arch/at91sam9261.h> > -#include <asm/arch/at91_pmc.h> > +#include <asm/io.h> > #include <asm/arch/gpio.h> > -#include <asm/arch/io.h> > > void coloured_LED_init(void) > { > - /* Enable clock */ > - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); > - > + /* Clock is enabled in board_early_init_f() */ > at91_set_gpio_output(CONFIG_RED_LED, 1); > at91_set_gpio_output(CONFIG_GREEN_LED, 1); > at91_set_gpio_output(CONFIG_YELLOW_LED, 1); > diff --git a/boards.cfg b/boards.cfg > index 0da32ef..488ef80 100644 should go into Patch v1/2 > --- a/boards.cfg > +++ b/boards.cfg > @@ -82,6 +82,12 @@ at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel > at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH > at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 > at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 > +at91sam9261ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0 > +at91sam9261ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3 > +at91sam9261ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH > +at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 > +at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 > +at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH > top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000 > top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000 > meesc arm arm926ejs - esd at91 > diff --git a/doc/README.at91 b/doc/README.at91 > index 84b5595..279c9f3 100644 > --- a/doc/README.at91 > +++ b/doc/README.at91 > @@ -42,8 +42,7 @@ Environment variables > - Dataflash on SPI chip select 3 (dataflash card) > - Nand flash. > > - You can choose your storage location at config step (here for at91sam9260ek) : > - make at91sam9261ek_config - use data flash (spi cs0) (default) > + You can choose your storage location at config step (here for at91sam9261ek) : > make at91sam9261ek_nandflash_config - use nand flash > make at91sam9261ek_dataflash_cs0_config - use data flash (spi cs0) > make at91sam9261ek_dataflash_cs3_config - use data flash (spi cs3) > diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h > index d601dad..c0d91d0 100644 > --- a/include/configs/at91sam9261ek.h > +++ b/include/configs/at91sam9261ek.h > @@ -27,7 +27,11 @@ > #ifndef __CONFIG_H > #define __CONFIG_H > > -#define CONFIG_AT91_LEGACY > +/* > + * SoC must be defined first, before hardware.h is included. > + * In this case SoC is defined in boards.cfg. > + */ > +#include <asm/hardware.h> > > /* > * WARNING: > @@ -45,14 +49,12 @@ > #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ > #define CONFIG_SYS_HZ 1000 > > -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ > /* Define actual evaluation board type from used processor type */ > -#ifdef CONFIG_AT91SAM9G10EK > -#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/ > +#ifdef CONFIG_AT91SAM9G10 > +# define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK */ > #else > -#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ > +# define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK */ > #endif > -#define CONFIG_AT91FAMILY > > /* Misc CPU related */ > #define CONFIG_ARCH_CPU_INIT > @@ -62,8 +64,10 @@ > #define CONFIG_INITRD_TAG > > #define CONFIG_SKIP_LOWLEVEL_INIT > +#define CONFIG_BOARD_EARLY_INIT_F > > /* general purpose I/O */ > +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ > #define CONFIG_AT91_GPIO > > /* LCD */ > @@ -84,10 +88,8 @@ > > /* serial console */ > #define CONFIG_ATMEL_USART > -#undef CONFIG_USART0 > -#undef CONFIG_USART1 > -#undef CONFIG_USART2 > -#define CONFIG_USART3 1 /* USART 3 is DBGU */ > +#define CONFIG_USART_BASE ATMEL_BASE_DBGU > +#define CONFIG_USART_ID ATMEL_ID_SYS > #define CONFIG_BAUDRATE 115200 > #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } > > @@ -129,12 +131,13 @@ > * Initialized before u-boot gets started. > */ > #define CONFIG_NR_DRAM_BANKS 1 > -#define CONFIG_SYS_SDRAM_BASE 0x20000000 > +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 > #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ > > /* size in bytes reserved for initial data */ > #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 \ > - GENERATED_GBL_DATA_SIZE) > + > /* DataFlash */ > #define CONFIG_ATMEL_DATAFLASH_SPI > #define CONFIG_HAS_DATAFLASH 1 > @@ -150,7 +153,7 @@ > #ifdef CONFIG_CMD_NAND > #define CONFIG_NAND_ATMEL > #define CONFIG_SYS_MAX_NAND_DEVICE 1 > -#define CONFIG_SYS_NAND_BASE 0x40000000 > +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 > #define CONFIG_SYS_NAND_DBW_8 > #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) > #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) > -- > 1.7.1 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
Dear Andreas Bießmann, Dear Remy Bohmer, > > some more comments on that patchset. > > Am 05.02.2011 um 13:43 schrieb Remy Bohmer: > >> Also removes CONFIG_AT91_LEGACY related stuff. >> >> Signed-off-by: Remy Bohmer<linux@bohmer.net> >> --- >> V1: This patch contains everything to make the boards work again on >> the current changes in the u-boot-atmel.git tree. >> It requires the mainstream fixes to be applied first >> ([PATCH 1/2 V3] at91sam9261ek: make operational again) >> >> This patch-series can be pulled from: >> git://git.denx.de/u-boot-usb.git -> fix-at91sam9261ek >> >> Makefile | 23 ---- >> arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c | 31 +++-- >> arch/arm/cpu/arm926ejs/at91/led.c | 1 - >> arch/arm/include/asm/arch-at91/at91_matrix.h | 17 ++- >> arch/arm/include/asm/arch-at91/at91sam9261.h | 1 + >> .../arm/include/asm/arch-at91/at91sam9261_matrix.h | 64 --------- UPPS.. no. at91_matrix.h should strip down to conditional includes like "hardware.h" or go away completely. The "matrix" appears to be very SoC specific, and we already have at91sam<SoC>_matrix.h files in the tree. They should be all made similar to the at91sam9260_matrix.h >> board/atmel/at91sam9261ek/at91sam9261ek.c | 140 +++++++++++--------- >> board/atmel/at91sam9261ek/led.c | 8 +- >> boards.cfg | 6 + >> doc/README.at91 | 3 +- >> include/configs/at91sam9261ek.h | 27 ++-- >> 11 files changed, 127 insertions(+), 194 deletions(-) >> delete mode 100644 arch/arm/include/asm/arch-at91/at91sam9261_matrix.h >> >> diff --git a/Makefile b/Makefile >> index 770fb0d..e934b75 100644 > > Please merge those changes to Makefile and boards.cfg into Patch 1/2. Actually 2 patches would be appreciated: 1. make the 9261/9g10 files reworked 2. fix the 9261ek to work on top of all that > >> --- a/Makefile >> +++ b/Makefile >> @@ -759,29 +759,6 @@ CPUAT91_config : unconfig >> ## ARM926EJ-S Systems >> ######################################################################### >> >> -at91sam9261ek_nandflash_config \ >> -at91sam9261ek_dataflash_cs0_config \ >> -at91sam9261ek_dataflash_cs3_config \ >> -at91sam9261ek_config \ >> -at91sam9g10ek_nandflash_config \ >> -at91sam9g10ek_dataflash_cs0_config \ >> -at91sam9g10ek_dataflash_cs3_config \ >> -at91sam9g10ek_config : unconfig >> - @mkdir -p $(obj)include >> - @if [ "$(findstring 9g10,$@)" ] ; then \ >> - echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \ >> - else \ >> - echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \ >> - fi; >> - @if [ "$(findstring _nandflash,$@)" ] ; then \ >> - echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ >> - elif [ "$(findstring dataflash_cs0,$@)" ] ; then \ >> - echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \ >> - else \ >> - echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \ >> - fi; >> - @$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91 >> - >> at91sam9263ek_norflash_config \ >> at91sam9263ek_norflash_boot_config \ >> at91sam9263ek_nandflash_config \ >> diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c >> index b4353ef..0e2c196 100644 > > those changes should go into u-boot-atmel/rework2011xxx branch See above. A separate patch adding to the rework effort would be appreciated. > >> --- a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c >> +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c >> @@ -23,45 +23,46 @@ >> */ >> >> #include<common.h> >> +#include<asm/io.h> >> +#include<asm/arch/at91sam9261.h> >> #include<asm/arch/at91_common.h> >> #include<asm/arch/at91_pmc.h> >> #include<asm/arch/gpio.h> >> -#include<asm/arch/io.h> >> >> void at91_serial0_hw_init(void) >> { >> - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; >> + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; >> >> at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */ >> at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */ >> - writel(1<< AT91SAM9261_ID_US0,&pmc->pcer); >> + writel(1<< ATMEL_ID_USART0,&pmc->pcer); >> } >> >> void at91_serial1_hw_init(void) >> { >> - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; >> + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; >> >> at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */ >> at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */ >> - writel(1<< AT91SAM9261_ID_US1,&pmc->pcer); >> + writel(1<< ATMEL_ID_USART1,&pmc->pcer); >> } >> >> void at91_serial2_hw_init(void) >> { >> - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; >> + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; >> >> at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */ >> at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */ >> - writel(1<< AT91SAM9261_ID_US2,&pmc->pcer); >> + writel(1<< ATMEL_ID_USART2,&pmc->pcer); >> } >> >> -void at91_serial3_hw_init(void) >> +void at91_seriald_hw_init(void) >> { >> - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; >> + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; >> >> at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */ >> at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ >> - writel(1<< AT91_ID_SYS,&pmc->pcer); >> + writel(1<< ATMEL_ID_SYS,&pmc->pcer); >> } >> >> void at91_serial_hw_init(void) >> @@ -79,21 +80,21 @@ void at91_serial_hw_init(void) >> #endif >> >> #ifdef CONFIG_USART3 /* DBGU */ >> - at91_serial3_hw_init(); >> + at91_seriald_hw_init(); >> #endif >> } Sorry that is not what is reworked in at91sam9260_devices.h: getting rid of the "CONFIG_USARTx" defines. >> >> #ifdef CONFIG_HAS_DATAFLASH >> void at91_spi0_hw_init(unsigned long cs_mask) >> { >> - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; >> + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; >> >> at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ >> at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ >> at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */ >> >> /* Enable clock */ >> - writel(1<< AT91SAM9261_ID_SPI0,&pmc->pcer); >> + writel(1<< ATMEL_ID_SPI0,&pmc->pcer); >> >> if (cs_mask& (1<< 0)) { >> at91_set_a_periph(AT91_PIO_PORTA, 3, 1); >> @@ -123,14 +124,14 @@ void at91_spi0_hw_init(unsigned long cs_mask) >> >> void at91_spi1_hw_init(unsigned long cs_mask) >> { >> - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; >> + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; >> >> at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */ >> at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */ >> at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */ >> >> /* Enable clock */ >> - writel(1<< AT91SAM9261_ID_SPI1,&pmc->pcer); >> + writel(1<< ATMEL_ID_SPI1,&pmc->pcer); >> >> if (cs_mask& (1<< 0)) { >> at91_set_a_periph(AT91_PIO_PORTB, 28, 1); >> diff --git a/arch/arm/cpu/arm926ejs/at91/led.c b/arch/arm/cpu/arm926ejs/at91/led.c >> index 6bcfa7f..e5f145a 100644 >> --- a/arch/arm/cpu/arm926ejs/at91/led.c >> +++ b/arch/arm/cpu/arm926ejs/at91/led.c >> @@ -24,7 +24,6 @@ >> >> #include<common.h> >> #include<asm/io.h> >> -#include<asm/arch/at91_pmc.h> >> #include<asm/arch/at91_pio.h> >> #include<asm/arch/gpio.h> >> >> diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h >> index f99b1d4..4cd7229 100644 >> --- a/arch/arm/include/asm/arch-at91/at91_matrix.h >> +++ b/arch/arm/include/asm/arch-at91/at91_matrix.h Don't use this file anymore. >> @@ -27,7 +27,7 @@ >> >> #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) >> #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x11C) >> -#elif defined(CONFIG_AT91SAM9261) >> +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) >> #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x30) >> #elif defined(CONFIG_AT91SAM9263) >> #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x120) >> @@ -43,7 +43,7 @@ >> #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) >> #define AT91_MATRIX_MASTERS 6 >> #define AT91_MATRIX_SLAVES 5 >> -#elif defined(CONFIG_AT91SAM9261) >> +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) >> #define AT91_MATRIX_MASTERS 1 >> #define AT91_MATRIX_SLAVES 5 >> #elif defined(CONFIG_AT91SAM9263) >> @@ -63,7 +63,7 @@ typedef struct at91_priority { >> >> typedef struct at91_matrix { >> u32 mcfg[AT91_MATRIX_MASTERS]; >> -#if defined(CONFIG_AT91SAM9261) >> +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) >> u32 scfg[AT91_MATRIX_SLAVES]; >> u32 res61_1[3]; >> u32 tcr; >> @@ -113,7 +113,7 @@ typedef struct at91_matrix { >> >> #define AT91_MATRIX_CSA_EBI1_CS2A 0x00000008 >> >> -#if defined CONFIG_AT91SAM9261 >> +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) >> /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ >> #define AT91_MATRIX_MCFG_RCB0 (1<< 0) >> /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ >> @@ -143,7 +143,8 @@ typedef struct at91_matrix { >> /* Fixed Index of Default Master */ >> #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) >> #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x& 0xf)<< 18) >> -#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) >> +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) || \ >> + defined(CONFIG_AT91SAM9G10) >> #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x& 7)<< 18) >> #endif >> >> @@ -151,7 +152,7 @@ typedef struct at91_matrix { >> #if defined(CONFIG_AT91SAM9G45) >> #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x& 0x1ff)<< 0) >> #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ >> - defined(CONFIG_AT91SAM9263) >> + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G10) >> #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x& 0xff)<< 0) >> #endif >> >> @@ -207,7 +208,7 @@ typedef struct at91_matrix { >> #define AT91_MATRIX_TCMR_DTCM_16 0x00000050 >> #define AT91_MATRIX_TCMR_DTCM_32 0x00000060 >> #endif >> -#if defined(CONFIG_AT91SAM9261) >> +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) >> /* Size of ITCM enabled memory block */ >> #define AT91_MATRIX_TCMR_ITCM_0 0x00000000 >> #define AT91_MATRIX_TCMR_ITCM_16 0x00000005 >> @@ -235,7 +236,7 @@ typedef struct at91_matrix { >> #endif >> >> /* USB Pad Pull-Up Control Register */ >> -#if defined(CONFIG_AT91SAM9261) >> +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) >> #define AT91_MATRIX_USBPUCR_PUON 0x40000000 >> #endif >> >> diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h >> index f8048d5..4bf7d8a 100644 >> --- a/arch/arm/include/asm/arch-at91/at91sam9261.h >> +++ b/arch/arm/include/asm/arch-at91/at91sam9261.h >> @@ -125,6 +125,7 @@ >> * Other misc defines >> */ >> #define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */ >> +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP I know, I do have the same ridiculous define in at91sam9260.h because I did not want to touch this as well. On the long run we should see to have those removed. >> >> /* >> * SoC specific defines >> diff --git a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h >> deleted file mode 100644 No, like with all at91sam<SoC>.h files it is better to keep those matrix defines in at91sam<SoC>_matric specific files. Otherwise we end up with a lot of #ifdefs in a single file. >> index e2bfc4b..0000000 >> --- a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h >> +++ /dev/null Of course, remove all the legacy stuff from that file. ... >> -#endif >> diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c >> index 25c181e..da2c2c6 100644 >> --- a/board/atmel/at91sam9261ek/at91sam9261ek.c >> +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c >> @@ -23,19 +23,16 @@ >> */ >> >> #include<common.h> >> -#include<asm/arch/at91sam9261.h> >> -#include<asm/arch/at91sam9261_matrix.h> >> +#include<asm/io.h> >> +#include<asm/arch/at91_matrix.h> Keep that the specific matrix include. >> #include<asm/arch/at91sam9_smc.h> >> #include<asm/arch/at91_common.h> >> #include<asm/arch/at91_pmc.h> >> -#include<asm/arch/at91_rstc.h> >> #include<asm/arch/clk.h> >> #include<asm/arch/gpio.h> >> -#include<asm/arch/io.h> >> #include<lcd.h> >> #include<atmel_lcdc.h> >> #if defined(CONFIG_RESET_PHY_R)&& defined(CONFIG_DRIVER_DM9000) >> -#include<net.h> >> #include<netdev.h> >> #endif >> >> @@ -49,44 +46,43 @@ DECLARE_GLOBAL_DATA_PTR; >> #ifdef CONFIG_CMD_NAND >> static void at91sam9261ek_nand_hw_init(void) >> { >> + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; >> + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; >> unsigned long csa; >> >> /* Enable CS3 */ >> - csa = at91_sys_read(AT91_MATRIX_EBICSA); >> - at91_sys_write(AT91_MATRIX_EBICSA, >> - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); >> + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; >> + writel(csa,&matrix->csa); >> >> /* Configure SMC CS3 for NAND/SmartMedia */ >> #ifdef CONFIG_AT91SAM9G10EK >> - at91_sys_write(AT91_SMC_SETUP(3), >> - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | >> - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); >> - at91_sys_write(AT91_SMC_PULSE(3), >> - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) | >> - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7)); >> - at91_sys_write(AT91_SMC_CYCLE(3), >> - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); >> + writel( AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | >> + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), >> + &smc->cs[3].setup); >> + writel( AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(7) | >> + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(7), >> + &smc->cs[3].pulse); >> + writel( AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), >> + &smc->cs[3].cycle); >> #else >> - at91_sys_write(AT91_SMC_SETUP(3), >> - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | >> - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); >> - at91_sys_write(AT91_SMC_PULSE(3), >> - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | >> - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); >> - at91_sys_write(AT91_SMC_CYCLE(3), >> - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); >> + writel( AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | >> + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), >> + &smc->cs[3].setup); >> + writel( AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | >> + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), >> + &smc->cs[3].pulse); >> + writel( AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), >> + &smc->cs[3].cycle); >> #endif >> - at91_sys_write(AT91_SMC_MODE(3), >> - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | >> - AT91_SMC_EXNWMODE_DISABLE | >> + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | >> + AT91_SMC_MODE_EXNW_DISABLE | >> #ifdef CONFIG_SYS_NAND_DBW_16 >> - AT91_SMC_DBW_16 | >> + AT91_SMC_MODE_DBW_16 | >> #else /* CONFIG_SYS_NAND_DBW_8 */ >> - AT91_SMC_DBW_8 | >> + AT91_SMC_MODE_DBW_8 | >> #endif >> - AT91_SMC_TDF_(2)); >> - >> - at91_sys_write(AT91_PMC_PCER, 1<< AT91SAM9261_ID_PIOC); >> + AT91_SMC_MODE_TDF_CYCLE(2), >> + &smc->cs[3].mode); >> >> /* Configure RDY/BSY */ >> at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); >> @@ -102,35 +98,37 @@ static void at91sam9261ek_nand_hw_init(void) >> #ifdef CONFIG_DRIVER_DM9000 >> static void at91sam9261ek_dm9000_hw_init(void) >> { >> + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; >> + >> /* Configure SMC CS2 for DM9000 */ >> #ifdef CONFIG_AT91SAM9G10EK >> - at91_sys_write(AT91_SMC_SETUP(2), >> - AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) | >> - AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0)); >> - at91_sys_write(AT91_SMC_PULSE(2), >> - AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) | >> - AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8)); >> - at91_sys_write(AT91_SMC_CYCLE(2), >> - AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20)); >> - at91_sys_write(AT91_SMC_MODE(2), >> - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | >> - AT91_SMC_EXNWMODE_DISABLE | >> - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | >> - AT91_SMC_TDF_(1)); >> + writel( AT91_SMC_SETUP_NWE(3) | AT91_SMC_SETUP_NCS_WR(0) | >> + AT91_SMC_SETUP_NRD(3) | AT91_SMC_SETUP_NCS_RD(0), >> + &smc->cs[2].setup); >> + writel( AT91_SMC_PULSE_NWE(6) | AT91_SMC_PULSE_NCS_WR(8) | >> + AT91_SMC_PULSE_NRD(6) | AT91_SMC_PULSE_NCS_RD(8), >> + &smc->cs[2].pulse); >> + writel( AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20), >> + &smc->cs[2].cycle); >> + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | >> + AT91_SMC_MODE_EXNW_DISABLE | >> + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | >> + AT91_SMC_MODE_TDF_CYCLE(1), >> + &smc->cs[2].mode); >> #else >> - at91_sys_write(AT91_SMC_SETUP(2), >> - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | >> - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); >> - at91_sys_write(AT91_SMC_PULSE(2), >> - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | >> - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); >> - at91_sys_write(AT91_SMC_CYCLE(2), >> - AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); >> - at91_sys_write(AT91_SMC_MODE(2), >> - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | >> - AT91_SMC_EXNWMODE_DISABLE | >> - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | >> - AT91_SMC_TDF_(1)); >> + writel( AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | >> + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), >> + &smc->cs[2].setup); >> + writel( AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | >> + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), >> + &smc->cs[2].pulse); >> + writel( AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), >> + &smc->cs[2].cycle); >> + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | >> + AT91_SMC_MODE_EXNW_DISABLE | >> + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | >> + AT91_SMC_MODE_TDF_CYCLE(1), >> + &smc->cs[2].mode); >> #endif >> >> /* Configure Reset signal as output */ >> @@ -156,7 +154,7 @@ vidinfo_t panel_info = { >> vl_vsync_len: 1, >> vl_upper_margin:1, >> vl_lower_margin:0, >> - mmio: AT91SAM9261_LCDC_BASE, >> + mmio: ATMEL_BASE_LCDC, >> }; >> >> void lcd_enable(void) >> @@ -171,6 +169,8 @@ void lcd_disable(void) >> >> static void at91sam9261ek_lcd_hw_init(void) >> { >> + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; >> + >> at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ >> at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ >> at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ >> @@ -194,12 +194,12 @@ static void at91sam9261ek_lcd_hw_init(void) >> at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ >> at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ >> >> - at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); >> + writel(AT91_PMC_HCK1,&pmc->scer); >> >> #ifdef CONFIG_AT91SAM9G10EK >> gd->fb_base = CONFIG_AT91SAM9G10_LCD_BASE; >> #else >> - gd->fb_base = AT91SAM9261_SRAM_BASE; >> + gd->fb_base = ATMEL_BASE_SRAM; >> #endif >> } >> >> @@ -217,7 +217,7 @@ void lcd_show_board_info(void) >> lcd_printf ("(C) 2008 ATMEL Corp\n"); >> lcd_printf ("at91support@atmel.com\n"); >> lcd_printf ("%s CPU at %s MHz\n", >> - CONFIG_SYS_AT91_CPU_NAME, >> + ATMEL_CPU_NAME, >> strmhz(temp, get_cpu_clk_rate())); >> >> dram_size = 0; >> @@ -233,6 +233,21 @@ void lcd_show_board_info(void) >> #endif /* CONFIG_LCD_INFO */ >> #endif >> >> +int board_early_init_f(void) >> +{ >> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; >> + >> + /* Enable clocks for all PIOs */ >> + writel( (1<< ATMEL_ID_PIOA) | (1<< ATMEL_ID_PIOB) | >> + (1<< ATMEL_ID_PIOC), >> + &pmc->pcer); >> + >> + /* Configure DBGU pins, the bootstrap code might skip it */ >> + at91_seriald_hw_init(); >> + >> + return 0; >> +} >> + >> int board_init(void) >> { >> /* Enable Ctrlc */ >> @@ -248,7 +263,6 @@ int board_init(void) >> /* adress of boot parameters */ >> gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; >> >> - at91_serial_hw_init(); >> #ifdef CONFIG_CMD_NAND >> at91sam9261ek_nand_hw_init(); >> #endif >> diff --git a/board/atmel/at91sam9261ek/led.c b/board/atmel/at91sam9261ek/led.c >> index 5d1c5f2..1c524f3 100644 >> --- a/board/atmel/at91sam9261ek/led.c >> +++ b/board/atmel/at91sam9261ek/led.c >> @@ -23,16 +23,12 @@ >> */ >> >> #include<common.h> >> -#include<asm/arch/at91sam9261.h> >> -#include<asm/arch/at91_pmc.h> >> +#include<asm/io.h> >> #include<asm/arch/gpio.h> >> -#include<asm/arch/io.h> >> >> void coloured_LED_init(void) >> { >> - /* Enable clock */ >> - at91_sys_write(AT91_PMC_PCER, 1<< AT91SAM9261_ID_PIOA); >> - >> + /* Clock is enabled in board_early_init_f() */ >> at91_set_gpio_output(CONFIG_RED_LED, 1); >> at91_set_gpio_output(CONFIG_GREEN_LED, 1); >> at91_set_gpio_output(CONFIG_YELLOW_LED, 1); >> diff --git a/boards.cfg b/boards.cfg >> index 0da32ef..488ef80 100644 > > should go into Patch v1/2 > >> --- a/boards.cfg >> +++ b/boards.cfg >> @@ -82,6 +82,12 @@ at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel >> at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH >> at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 >> at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 >> +at91sam9261ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0 >> +at91sam9261ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3 >> +at91sam9261ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH >> +at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 >> +at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 >> +at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH >> top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000 >> top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000 >> meesc arm arm926ejs - esd at91 >> diff --git a/doc/README.at91 b/doc/README.at91 >> index 84b5595..279c9f3 100644 >> --- a/doc/README.at91 >> +++ b/doc/README.at91 >> @@ -42,8 +42,7 @@ Environment variables >> - Dataflash on SPI chip select 3 (dataflash card) >> - Nand flash. >> >> - You can choose your storage location at config step (here for at91sam9260ek) : >> - make at91sam9261ek_config - use data flash (spi cs0) (default) >> + You can choose your storage location at config step (here for at91sam9261ek) : >> make at91sam9261ek_nandflash_config - use nand flash >> make at91sam9261ek_dataflash_cs0_config - use data flash (spi cs0) >> make at91sam9261ek_dataflash_cs3_config - use data flash (spi cs3) >> diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h >> index d601dad..c0d91d0 100644 >> --- a/include/configs/at91sam9261ek.h >> +++ b/include/configs/at91sam9261ek.h This file looks OK to me. >> @@ -27,7 +27,11 @@ >> #ifndef __CONFIG_H >> #define __CONFIG_H >> >> -#define CONFIG_AT91_LEGACY >> +/* >> + * SoC must be defined first, before hardware.h is included. >> + * In this case SoC is defined in boards.cfg. >> + */ >> +#include<asm/hardware.h> >> >> /* >> * WARNING: >> @@ -45,14 +49,12 @@ >> #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ >> #define CONFIG_SYS_HZ 1000 >> >> -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ >> /* Define actual evaluation board type from used processor type */ >> -#ifdef CONFIG_AT91SAM9G10EK >> -#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/ >> +#ifdef CONFIG_AT91SAM9G10 >> +# define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK */ >> #else >> -#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ >> +# define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK */ >> #endif >> -#define CONFIG_AT91FAMILY >> >> /* Misc CPU related */ >> #define CONFIG_ARCH_CPU_INIT >> @@ -62,8 +64,10 @@ >> #define CONFIG_INITRD_TAG >> >> #define CONFIG_SKIP_LOWLEVEL_INIT >> +#define CONFIG_BOARD_EARLY_INIT_F >> >> /* general purpose I/O */ >> +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ >> #define CONFIG_AT91_GPIO >> >> /* LCD */ >> @@ -84,10 +88,8 @@ >> >> /* serial console */ >> #define CONFIG_ATMEL_USART >> -#undef CONFIG_USART0 >> -#undef CONFIG_USART1 >> -#undef CONFIG_USART2 >> -#define CONFIG_USART3 1 /* USART 3 is DBGU */ >> +#define CONFIG_USART_BASE ATMEL_BASE_DBGU >> +#define CONFIG_USART_ID ATMEL_ID_SYS >> #define CONFIG_BAUDRATE 115200 >> #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } >> >> @@ -129,12 +131,13 @@ >> * Initialized before u-boot gets started. >> */ >> #define CONFIG_NR_DRAM_BANKS 1 >> -#define CONFIG_SYS_SDRAM_BASE 0x20000000 >> +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 >> #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ >> >> /* size in bytes reserved for initial data */ >> #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 \ >> - GENERATED_GBL_DATA_SIZE) >> + >> /* DataFlash */ >> #define CONFIG_ATMEL_DATAFLASH_SPI >> #define CONFIG_HAS_DATAFLASH 1 >> @@ -150,7 +153,7 @@ >> #ifdef CONFIG_CMD_NAND >> #define CONFIG_NAND_ATMEL >> #define CONFIG_SYS_MAX_NAND_DEVICE 1 >> -#define CONFIG_SYS_NAND_BASE 0x40000000 >> +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 >> #define CONFIG_SYS_NAND_DBW_8 >> #define CONFIG_SYS_NAND_MASK_ALE (1<< 22) >> #define CONFIG_SYS_NAND_MASK_CLE (1<< 21) >> -- >> 1.7.1 >> >> _______________________________________________ >> U-Boot mailing list >> U-Boot@lists.denx.de >> http://lists.denx.de/mailman/listinfo/u-boot > Good, but see my 2 patches comment in patch 1/2. Best Regards, Reinhard
diff --git a/Makefile b/Makefile index 770fb0d..e934b75 100644 --- a/Makefile +++ b/Makefile @@ -759,29 +759,6 @@ CPUAT91_config : unconfig ## ARM926EJ-S Systems ######################################################################### -at91sam9261ek_nandflash_config \ -at91sam9261ek_dataflash_cs0_config \ -at91sam9261ek_dataflash_cs3_config \ -at91sam9261ek_config \ -at91sam9g10ek_nandflash_config \ -at91sam9g10ek_dataflash_cs0_config \ -at91sam9g10ek_dataflash_cs3_config \ -at91sam9g10ek_config : unconfig - @mkdir -p $(obj)include - @if [ "$(findstring 9g10,$@)" ] ; then \ - echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \ - else \ - echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \ - fi; - @if [ "$(findstring _nandflash,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ - elif [ "$(findstring dataflash_cs0,$@)" ] ; then \ - echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \ - else \ - echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \ - fi; - @$(MKCONFIG) -n $@ -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91 - at91sam9263ek_norflash_config \ at91sam9263ek_norflash_boot_config \ at91sam9263ek_nandflash_config \ diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c index b4353ef..0e2c196 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c @@ -23,45 +23,46 @@ */ #include <common.h> +#include <asm/io.h> +#include <asm/arch/at91sam9261.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> void at91_serial0_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */ at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */ - writel(1 << AT91SAM9261_ID_US0, &pmc->pcer); + writel(1 << ATMEL_ID_USART0, &pmc->pcer); } void at91_serial1_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */ at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */ - writel(1 << AT91SAM9261_ID_US1, &pmc->pcer); + writel(1 << ATMEL_ID_USART1, &pmc->pcer); } void at91_serial2_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */ at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */ - writel(1 << AT91SAM9261_ID_US2, &pmc->pcer); + writel(1 << ATMEL_ID_USART2, &pmc->pcer); } -void at91_serial3_hw_init(void) +void at91_seriald_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */ at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ - writel(1 << AT91_ID_SYS, &pmc->pcer); + writel(1 << ATMEL_ID_SYS, &pmc->pcer); } void at91_serial_hw_init(void) @@ -79,21 +80,21 @@ void at91_serial_hw_init(void) #endif #ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); + at91_seriald_hw_init(); #endif } #ifdef CONFIG_HAS_DATAFLASH void at91_spi0_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */ at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */ at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */ /* Enable clock */ - writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer); + writel(1 << ATMEL_ID_SPI0, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTA, 3, 1); @@ -123,14 +124,14 @@ void at91_spi0_hw_init(unsigned long cs_mask) void at91_spi1_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */ at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */ at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */ /* Enable clock */ - writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer); + writel(1 << ATMEL_ID_SPI1, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTB, 28, 1); diff --git a/arch/arm/cpu/arm926ejs/at91/led.c b/arch/arm/cpu/arm926ejs/at91/led.c index 6bcfa7f..e5f145a 100644 --- a/arch/arm/cpu/arm926ejs/at91/led.c +++ b/arch/arm/cpu/arm926ejs/at91/led.c @@ -24,7 +24,6 @@ #include <common.h> #include <asm/io.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_pio.h> #include <asm/arch/gpio.h> diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h index f99b1d4..4cd7229 100644 --- a/arch/arm/include/asm/arch-at91/at91_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91_matrix.h @@ -27,7 +27,7 @@ #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x11C) -#elif defined(CONFIG_AT91SAM9261) +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x30) #elif defined(CONFIG_AT91SAM9263) #define AT91_ASM_MATRIX_CSA0 (AT91_MATRIX_BASE + 0x120) @@ -43,7 +43,7 @@ #if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) #define AT91_MATRIX_MASTERS 6 #define AT91_MATRIX_SLAVES 5 -#elif defined(CONFIG_AT91SAM9261) +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) #define AT91_MATRIX_MASTERS 1 #define AT91_MATRIX_SLAVES 5 #elif defined(CONFIG_AT91SAM9263) @@ -63,7 +63,7 @@ typedef struct at91_priority { typedef struct at91_matrix { u32 mcfg[AT91_MATRIX_MASTERS]; -#if defined(CONFIG_AT91SAM9261) +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) u32 scfg[AT91_MATRIX_SLAVES]; u32 res61_1[3]; u32 tcr; @@ -113,7 +113,7 @@ typedef struct at91_matrix { #define AT91_MATRIX_CSA_EBI1_CS2A 0x00000008 -#if defined CONFIG_AT91SAM9261 +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ #define AT91_MATRIX_MCFG_RCB0 (1 << 0) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ @@ -143,7 +143,8 @@ typedef struct at91_matrix { /* Fixed Index of Default Master */ #if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18) -#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) || \ + defined(CONFIG_AT91SAM9G10) #define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18) #endif @@ -151,7 +152,7 @@ typedef struct at91_matrix { #if defined(CONFIG_AT91SAM9G45) #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0) #elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ - defined(CONFIG_AT91SAM9263) + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G10) #define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0xff) << 0) #endif @@ -207,7 +208,7 @@ typedef struct at91_matrix { #define AT91_MATRIX_TCMR_DTCM_16 0x00000050 #define AT91_MATRIX_TCMR_DTCM_32 0x00000060 #endif -#if defined(CONFIG_AT91SAM9261) +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) /* Size of ITCM enabled memory block */ #define AT91_MATRIX_TCMR_ITCM_0 0x00000000 #define AT91_MATRIX_TCMR_ITCM_16 0x00000005 @@ -235,7 +236,7 @@ typedef struct at91_matrix { #endif /* USB Pad Pull-Up Control Register */ -#if defined(CONFIG_AT91SAM9261) +#if defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9G10) #define AT91_MATRIX_USBPUCR_PUON 0x40000000 #endif diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h index f8048d5..4bf7d8a 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9261.h +++ b/arch/arm/include/asm/arch-at91/at91sam9261.h @@ -125,6 +125,7 @@ * Other misc defines */ #define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */ +#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP /* * SoC specific defines diff --git a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h deleted file mode 100644 index e2bfc4b..0000000 --- a/arch/arm/include/asm/arch-at91/at91sam9261_matrix.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261_matrix.h] - * - * Copyright (C) 2007 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_MATRIX_H -#define AT91SAM9261_MATRIX_H - -#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ - -#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_ITCM_64 (7 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ - -#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ -#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ - -#endif diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 25c181e..da2c2c6 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -23,19 +23,16 @@ */ #include <common.h> -#include <asm/arch/at91sam9261.h> -#include <asm/arch/at91sam9261_matrix.h> +#include <asm/io.h> +#include <asm/arch/at91_matrix.h> #include <asm/arch/at91sam9_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> -#include <asm/arch/at91_rstc.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> #include <lcd.h> #include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) -#include <net.h> #include <netdev.h> #endif @@ -49,44 +46,43 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_CMD_NAND static void at91sam9261ek_nand_hw_init(void) { + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; unsigned long csa; /* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa); /* Configure SMC CS3 for NAND/SmartMedia */ #ifdef CONFIG_AT91SAM9G10EK - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + writel( AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + writel( AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(7) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(7), + &smc->cs[3].pulse); + writel( AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), + &smc->cs[3].cycle); #else - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + writel( AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + writel( AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + writel( AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); #endif - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 - AT91_SMC_DBW_16 | + AT91_SMC_MODE_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ - AT91_SMC_DBW_8 | + AT91_SMC_MODE_DBW_8 | #endif - AT91_SMC_TDF_(2)); - - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); /* Configure RDY/BSY */ at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); @@ -102,35 +98,37 @@ static void at91sam9261ek_nand_hw_init(void) #ifdef CONFIG_DRIVER_DM9000 static void at91sam9261ek_dm9000_hw_init(void) { + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; + /* Configure SMC CS2 for DM9000 */ #ifdef CONFIG_AT91SAM9G10EK - at91_sys_write(AT91_SMC_SETUP(2), - AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(2), - AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) | - AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8)); - at91_sys_write(AT91_SMC_CYCLE(2), - AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20)); - at91_sys_write(AT91_SMC_MODE(2), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | - AT91_SMC_TDF_(1)); + writel( AT91_SMC_SETUP_NWE(3) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(3) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[2].setup); + writel( AT91_SMC_PULSE_NWE(6) | AT91_SMC_PULSE_NCS_WR(8) | + AT91_SMC_PULSE_NRD(6) | AT91_SMC_PULSE_NCS_RD(8), + &smc->cs[2].pulse); + writel( AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20), + &smc->cs[2].cycle); + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | + AT91_SMC_MODE_TDF_CYCLE(1), + &smc->cs[2].mode); #else - at91_sys_write(AT91_SMC_SETUP(2), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(2), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); - at91_sys_write(AT91_SMC_CYCLE(2), - AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); - at91_sys_write(AT91_SMC_MODE(2), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | - AT91_SMC_TDF_(1)); + writel( AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[2].setup); + writel( AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), + &smc->cs[2].pulse); + writel( AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), + &smc->cs[2].cycle); + writel( AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | + AT91_SMC_MODE_TDF_CYCLE(1), + &smc->cs[2].mode); #endif /* Configure Reset signal as output */ @@ -156,7 +154,7 @@ vidinfo_t panel_info = { vl_vsync_len: 1, vl_upper_margin:1, vl_lower_margin:0, - mmio: AT91SAM9261_LCDC_BASE, + mmio: ATMEL_BASE_LCDC, }; void lcd_enable(void) @@ -171,6 +169,8 @@ void lcd_disable(void) static void at91sam9261ek_lcd_hw_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ @@ -194,12 +194,12 @@ static void at91sam9261ek_lcd_hw_init(void) at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ - at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); + writel(AT91_PMC_HCK1, &pmc->scer); #ifdef CONFIG_AT91SAM9G10EK gd->fb_base = CONFIG_AT91SAM9G10_LCD_BASE; #else - gd->fb_base = AT91SAM9261_SRAM_BASE; + gd->fb_base = ATMEL_BASE_SRAM; #endif } @@ -217,7 +217,7 @@ void lcd_show_board_info(void) lcd_printf ("(C) 2008 ATMEL Corp\n"); lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", - CONFIG_SYS_AT91_CPU_NAME, + ATMEL_CPU_NAME, strmhz(temp, get_cpu_clk_rate())); dram_size = 0; @@ -233,6 +233,21 @@ void lcd_show_board_info(void) #endif /* CONFIG_LCD_INFO */ #endif +int board_early_init_f(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + + /* Enable clocks for all PIOs */ + writel( (1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) | + (1 << ATMEL_ID_PIOC), + &pmc->pcer); + + /* Configure DBGU pins, the bootstrap code might skip it */ + at91_seriald_hw_init(); + + return 0; +} + int board_init(void) { /* Enable Ctrlc */ @@ -248,7 +263,6 @@ int board_init(void) /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - at91_serial_hw_init(); #ifdef CONFIG_CMD_NAND at91sam9261ek_nand_hw_init(); #endif diff --git a/board/atmel/at91sam9261ek/led.c b/board/atmel/at91sam9261ek/led.c index 5d1c5f2..1c524f3 100644 --- a/board/atmel/at91sam9261ek/led.c +++ b/board/atmel/at91sam9261ek/led.c @@ -23,16 +23,12 @@ */ #include <common.h> -#include <asm/arch/at91sam9261.h> -#include <asm/arch/at91_pmc.h> +#include <asm/io.h> #include <asm/arch/gpio.h> -#include <asm/arch/io.h> void coloured_LED_init(void) { - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); - + /* Clock is enabled in board_early_init_f() */ at91_set_gpio_output(CONFIG_RED_LED, 1); at91_set_gpio_output(CONFIG_GREEN_LED, 1); at91_set_gpio_output(CONFIG_YELLOW_LED, 1); diff --git a/boards.cfg b/boards.cfg index 0da32ef..488ef80 100644 --- a/boards.cfg +++ b/boards.cfg @@ -82,6 +82,12 @@ at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 +at91sam9261ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0 +at91sam9261ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3 +at91sam9261ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH +at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 +at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 +at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000 top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000 meesc arm arm926ejs - esd at91 diff --git a/doc/README.at91 b/doc/README.at91 index 84b5595..279c9f3 100644 --- a/doc/README.at91 +++ b/doc/README.at91 @@ -42,8 +42,7 @@ Environment variables - Dataflash on SPI chip select 3 (dataflash card) - Nand flash. - You can choose your storage location at config step (here for at91sam9260ek) : - make at91sam9261ek_config - use data flash (spi cs0) (default) + You can choose your storage location at config step (here for at91sam9261ek) : make at91sam9261ek_nandflash_config - use nand flash make at91sam9261ek_dataflash_cs0_config - use data flash (spi cs0) make at91sam9261ek_dataflash_cs3_config - use data flash (spi cs3) diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index d601dad..c0d91d0 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -27,7 +27,11 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_AT91_LEGACY +/* + * SoC must be defined first, before hardware.h is included. + * In this case SoC is defined in boards.cfg. + */ +#include <asm/hardware.h> /* * WARNING: @@ -45,14 +49,12 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ #define CONFIG_SYS_HZ 1000 -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ /* Define actual evaluation board type from used processor type */ -#ifdef CONFIG_AT91SAM9G10EK -#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/ +#ifdef CONFIG_AT91SAM9G10 +# define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK */ #else -#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/ +# define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK */ #endif -#define CONFIG_AT91FAMILY /* Misc CPU related */ #define CONFIG_ARCH_CPU_INIT @@ -62,8 +64,10 @@ #define CONFIG_INITRD_TAG #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F /* general purpose I/O */ +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ #define CONFIG_AT91_GPIO /* LCD */ @@ -84,10 +88,8 @@ /* serial console */ #define CONFIG_ATMEL_USART -#undef CONFIG_USART0 -#undef CONFIG_USART1 -#undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID ATMEL_ID_SYS #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } @@ -129,12 +131,13 @@ * Initialized before u-boot gets started. */ #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ /* size in bytes reserved for initial data */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 \ - GENERATED_GBL_DATA_SIZE) + /* DataFlash */ #define CONFIG_ATMEL_DATAFLASH_SPI #define CONFIG_HAS_DATAFLASH 1 @@ -150,7 +153,7 @@ #ifdef CONFIG_CMD_NAND #define CONFIG_NAND_ATMEL #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) #define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
Also removes CONFIG_AT91_LEGACY related stuff. Signed-off-by: Remy Bohmer <linux@bohmer.net> --- V1: This patch contains everything to make the boards work again on the current changes in the u-boot-atmel.git tree. It requires the mainstream fixes to be applied first ([PATCH 1/2 V3] at91sam9261ek: make operational again) This patch-series can be pulled from: git://git.denx.de/u-boot-usb.git -> fix-at91sam9261ek Makefile | 23 ---- arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c | 31 +++-- arch/arm/cpu/arm926ejs/at91/led.c | 1 - arch/arm/include/asm/arch-at91/at91_matrix.h | 17 ++- arch/arm/include/asm/arch-at91/at91sam9261.h | 1 + .../arm/include/asm/arch-at91/at91sam9261_matrix.h | 64 --------- board/atmel/at91sam9261ek/at91sam9261ek.c | 140 +++++++++++--------- board/atmel/at91sam9261ek/led.c | 8 +- boards.cfg | 6 + doc/README.at91 | 3 +- include/configs/at91sam9261ek.h | 27 ++-- 11 files changed, 127 insertions(+), 194 deletions(-) delete mode 100644 arch/arm/include/asm/arch-at91/at91sam9261_matrix.h