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[v3,5/7] dt-bindings: Add Tegra PMC pad configuration bindings

Message ID 1531396813-6581-6-git-send-email-avienamo@nvidia.com
State Superseded
Headers show
Series Tegra PMC pinctrl pad configuration | expand

Commit Message

Aapo Vienamo July 12, 2018, noon UTC
Document the pinctrl bindings used by the PMC driver for performing pad
configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt
are modified as they both cover SoC generations for which these bindings
apply.

Add a header defining Tegra PMC pad voltage configurations.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
---
 .../bindings/arm/tegra/nvidia,tegra186-pmc.txt     | 84 +++++++++++++++++++
 .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      | 95 ++++++++++++++++++++++
 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 ++++
 3 files changed, 197 insertions(+)
 create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h

Comments

Rob Herring (Arm) July 16, 2018, 3:43 p.m. UTC | #1
On Thu, Jul 12, 2018 at 03:00:11PM +0300, Aapo Vienamo wrote:
> Document the pinctrl bindings used by the PMC driver for performing pad
> configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt
> are modified as they both cover SoC generations for which these bindings
> apply.
> 
> Add a header defining Tegra PMC pad voltage configurations.
> 
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> Acked-by: Jon Hunter <jonathanh@nvidia.com>
> ---
>  .../bindings/arm/tegra/nvidia,tegra186-pmc.txt     | 84 +++++++++++++++++++
>  .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      | 95 ++++++++++++++++++++++
>  include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 ++++
>  3 files changed, 197 insertions(+)
>  create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> 
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> index 5a3bf7c..9528f41 100644
> --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> @@ -34,3 +34,87 @@ Board DTS:
>  	pmc@c360000 {
>  		nvidia,invert-interrupt;
>  	};
> +
> +== Pad Control Nodes ==
> +
> +The PMC can be used to set pad power state and voltage configuration.
> +The pad configuration is done via the pinctrl framework. The driver
> +implements power-source, low-power-enable, and low-power-disable pinconf
> +pin configuration node properties. Each pinctrl pin corresponds to a
> +single Tegra PMC pad. Thus, in the following sections of this document
> +pin refers to the pinctrl frameworks notion of a Tegra PMC pad.

"pinctrl framework" is Linux specific and doesn't belong in the binding. 
Neither does what a driver supports. Describe what the h/w supports.

> +
> +The pad configuration state nodes are placed under the pmc node and they
> +are referred to by the pinctrl client device properties. For more

Another driver detail not relevant.

> +information see the examples presented later and

examples don't document bindings. The documentation should be complete 
without examples.

> +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
> +
> +The values accepted by power-source property are
> +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
> +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.

You need to list out what properties the child nodes can have.

power-source needs a vendor prefix.

> +
> +Following pinctrl pin name strings are present on Tegra186:
> +csia		csib		dsi		mipi-bias
> +pex-clk-bias	pex-clk3	pex-clk2	pex-clk1
> +usb0		usb1		usb2		usb-bias
> +uart		audio		hsic		dbg
> +hdmi-dp0	hdmi-dp1	pex-cntrl	sdmmc2-hv
> +sdmmc4		cam		dsib		dsic
> +dsid		csic		csid		csie
> +dsif		spi		ufs		dmic-hv
> +edp		sdmmc1-hv	sdmmc3-hv	conn
> +audio-hv	ao-hv
> +
> +All of the listed Tegra186 pins except ao-hv support the
> +low-power-enable and low-power-disable properties. The power-source
> +property is supported following Tegra210 pins: sdmmc2-hv, dmic-hv,
> +sdmmc1-hv, sdmmc3-hv, audio-hv, ao-hv.
> +
> +Pad configuration state example:
> +	pmc: pmc@7000e400 {
> +		compatible = "nvidia,tegra186-pmc";
> +		reg = <0 0x0c360000 0 0x10000>,
> +		      <0 0x0c370000 0 0x10000>,
> +		      <0 0x0c380000 0 0x10000>,
> +		      <0 0x0c390000 0 0x10000>;
> +		reg-names = "pmc", "wake", "aotag", "scratch";
> +
> +		...
> +
> +		sdmmc1_3v3: sdmmc1-3v3 {
> +			pins = "sdmmc1-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
> +		};
> +
> +		sdmmc1_1v8: sdmmc1-1v8 {
> +			pins = "sdmmc1-hv";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
> +		};
> +
> +		hdmi_off: hdmi-off {
> +			pins = "hdmi";
> +			low-power-enable;
> +		}
> +
> +		hdmi_on: hdmi-on {
> +			pins = "hdmi";
> +			low-power-disable;
> +		}
> +	};
> +
> +Pinctrl client example:
> +	sdmmc1: sdhci@3400000 {
> +		...
> +		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> +		pinctrl-0 = <&sdmmc1_3v3>;
> +		pinctrl-1 = <&sdmmc1_1v8>;
> +	};
> +
> +	...
> +
> +	sor0: sor@15540000 {
> +		...
> +		pinctrl-0 = <&hdmi_off>;
> +		pinctrl-1 = <&hdmi_on>;
> +		pinctrl-names = "hdmi-on", "hdmi-off";
> +	};
> diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
> index a74b37b..d50a505 100644
> --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
> +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
> @@ -195,3 +195,98 @@ Example:
>  		power-domains = <&pd_audio>;
>  		...
>  	};
> +
> +== Pad Control Nodes ==

Similar comments in this file.

> +
> +The PMC can be used to set pad power state and voltage configuration.
> +This functionality is present on SoCs from Tegra124 onwards. The pad
> +configuration is done via the pinctrl framework. The driver implements
> +power-source, low-power-enable, and low-power-disable pinconf pin
> +configuration node properties. Each pinctrl pin corresponds to a single
> +Tegra PMC pad. Thus, in the following sections of this document pin
> +refers to the pinctrl frameworks notion of a Tegra PMC pad.
> +
> +The pad configuration state nodes are placed under the pmc node and they
> +are referred to by the pinctrl client device properties. For more
> +information see the examples presented later and
> +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
> +
> +The values accepted by power-source property are
> +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
> +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
> +
> +Following pinctrl pin name strings are present on Tegra124 and Tegra132:
> +audio		bb		cam		comp
> +csia		csb		cse		dsi
> +dsib		dsic		dsid		hdmi
> +hsic		hv		lvds		mipi-bias
> +nand		pex-bias	pex-clk1	pex-clk2
> +pex-cntrl	sdmmc1		sdmmc3		sdmmc4
> +sys_ddc		uart		usb0		usb1
> +usb2		usb_bias
> +
> +All of the listed Tegra124 and Tegra132 pins support the
> +low-power-enable and low-power-disable properties. None of the pins
> +support the power-source property.
> +
> +Following pinctrl pin name strings are present on Tegra210:
> +audio		audio-hv	cam		csia
> +csib		csic		csid		csie
> +csif		dbg		debug-nonao	dmic
> +dp		dsi		dsib		dsic
> +dsid		emmc		emmc2		gpio
> +hdmi		hsic		lvds		mipi-bias
> +pex-bias	pex-clk1	pex-clk2	pex-cntrl
> +sdmmc1		sdmmc3		spi		spi-hv
> +uart		usb0		usb1		usb2
> +usb3		usb-bias
> +
> +All of the listed Tegra210 pins except pex-cntrl support the
> +low-power-enable and low-power-disable properties. The power-source
> +property is supported following Tegra210 pins: audio, audio-hv, cam,
> +dbg, dmic, gpio, pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart.
> +
> +Pad configuration state example:
> +	pmc: pmc@7000e400 {
> +		compatible = "nvidia,tegra210-pmc";
> +		reg = <0x0 0x7000e400 0x0 0x400>;
> +		clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
> +		clock-names = "pclk", "clk32k_in";
> +
> +		...
> +
> +		sdmmc1_3v3: sdmmc1-3v3 {
> +			pins = "sdmmc1";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
> +		};
> +
> +		sdmmc1_1v8: sdmmc1-1v8 {
> +			pins = "sdmmc1";
> +			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
> +		};
> +
> +		hdmi_off: hdmi-off {
> +			pins = "hdmi";
> +			low-power-enable;
> +		}
> +
> +		hdmi_on: hdmi-on {
> +			pins = "hdmi";
> +			low-power-disable;
> +		}
> +	};
> +
> +Pinctrl client example:
> +	sdmmc1: sdhci@700b0000 {
> +		...
> +		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> +		pinctrl-0 = <&sdmmc1_3v3>;
> +		pinctrl-1 = <&sdmmc1_1v8>;
> +	};
> +	...
> +	sor@54540000 {
> +		...
> +		pinctrl-0 = <&hdmi_off>;
> +		pinctrl-1 = <&hdmi_on>;
> +		pinctrl-names = "hdmi-on", "hdmi-off";
> +	};
> diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> new file mode 100644
> index 0000000..20f4340
> --- /dev/null
> +++ b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * pinctrl-tegra-io-pad.h: Tegra I/O pad source voltage configuration constants
> + * pinctrl bindings.
> + *
> + * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
> + *
> + * Author: Aapo Vienamo <avienamo@nvidia.com>
> + */
> +
> +#ifndef _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
> +#define _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
> +
> +/* Voltage levels of the I/O pad's source rail */
> +#define TEGRA_IO_PAD_VOLTAGE_1V8	0
> +#define TEGRA_IO_PAD_VOLTAGE_3V3	1
> +
> +#endif
> -- 
> 2.7.4
> 
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Aapo Vienamo July 17, 2018, 12:23 p.m. UTC | #2
On Mon, 16 Jul 2018 09:43:09 -0600
Rob Herring <robh@kernel.org> wrote:

> On Thu, Jul 12, 2018 at 03:00:11PM +0300, Aapo Vienamo wrote:
> > Document the pinctrl bindings used by the PMC driver for performing pad
> > configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt
> > are modified as they both cover SoC generations for which these bindings
> > apply.
> > 
> > Add a header defining Tegra PMC pad voltage configurations.
> > 
> > Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> > Acked-by: Jon Hunter <jonathanh@nvidia.com>
> > ---
> >  .../bindings/arm/tegra/nvidia,tegra186-pmc.txt     | 84 +++++++++++++++++++
> >  .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      | 95 ++++++++++++++++++++++
> >  include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 ++++
> >  3 files changed, 197 insertions(+)
> >  create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> > 
> > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > index 5a3bf7c..9528f41 100644
> > --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > @@ -34,3 +34,87 @@ Board DTS:
> >  	pmc@c360000 {
> >  		nvidia,invert-interrupt;
> >  	};
> > +
> > +== Pad Control Nodes ==
> > +
> > +The PMC can be used to set pad power state and voltage configuration.
> > +The pad configuration is done via the pinctrl framework. The driver
> > +implements power-source, low-power-enable, and low-power-disable pinconf
> > +pin configuration node properties. Each pinctrl pin corresponds to a
> > +single Tegra PMC pad. Thus, in the following sections of this document
> > +pin refers to the pinctrl frameworks notion of a Tegra PMC pad.  
> 
> "pinctrl framework" is Linux specific and doesn't belong in the binding. 
> Neither does what a driver supports. Describe what the h/w supports.
> 
> > +
> > +The pad configuration state nodes are placed under the pmc node and they
> > +are referred to by the pinctrl client device properties. For more  
> 
> Another driver detail not relevant.
> 
> > +information see the examples presented later and  
> 
> examples don't document bindings. The documentation should be complete 
> without examples.
> 
> > +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
> > +
> > +The values accepted by power-source property are
> > +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
> > +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.  
> 
> You need to list out what properties the child nodes can have.
> 
> power-source needs a vendor prefix.

Isn't it a generic pinctrl property?

> > +
> > +Following pinctrl pin name strings are present on Tegra186:
> > +csia		csib		dsi		mipi-bias
> > +pex-clk-bias	pex-clk3	pex-clk2	pex-clk1
> > +usb0		usb1		usb2		usb-bias
> > +uart		audio		hsic		dbg
> > +hdmi-dp0	hdmi-dp1	pex-cntrl	sdmmc2-hv
> > +sdmmc4		cam		dsib		dsic
> > +dsid		csic		csid		csie
> > +dsif		spi		ufs		dmic-hv
> > +edp		sdmmc1-hv	sdmmc3-hv	conn
> > +audio-hv	ao-hv
> > +
> > +All of the listed Tegra186 pins except ao-hv support the
> > +low-power-enable and low-power-disable properties. The power-source
> > +property is supported following Tegra210 pins: sdmmc2-hv, dmic-hv,
> > +sdmmc1-hv, sdmmc3-hv, audio-hv, ao-hv.
> > +
> > +Pad configuration state example:
> > +	pmc: pmc@7000e400 {
> > +		compatible = "nvidia,tegra186-pmc";
> > +		reg = <0 0x0c360000 0 0x10000>,
> > +		      <0 0x0c370000 0 0x10000>,
> > +		      <0 0x0c380000 0 0x10000>,
> > +		      <0 0x0c390000 0 0x10000>;
> > +		reg-names = "pmc", "wake", "aotag", "scratch";
> > +
> > +		...
> > +
> > +		sdmmc1_3v3: sdmmc1-3v3 {
> > +			pins = "sdmmc1-hv";
> > +			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
> > +		};
> > +
> > +		sdmmc1_1v8: sdmmc1-1v8 {
> > +			pins = "sdmmc1-hv";
> > +			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
> > +		};
> > +
> > +		hdmi_off: hdmi-off {
> > +			pins = "hdmi";
> > +			low-power-enable;
> > +		}
> > +
> > +		hdmi_on: hdmi-on {
> > +			pins = "hdmi";
> > +			low-power-disable;
> > +		}
> > +	};
> > +
> > +Pinctrl client example:
> > +	sdmmc1: sdhci@3400000 {
> > +		...
> > +		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> > +		pinctrl-0 = <&sdmmc1_3v3>;
> > +		pinctrl-1 = <&sdmmc1_1v8>;
> > +	};
> > +
> > +	...
> > +
> > +	sor0: sor@15540000 {
> > +		...
> > +		pinctrl-0 = <&hdmi_off>;
> > +		pinctrl-1 = <&hdmi_on>;
> > +		pinctrl-names = "hdmi-on", "hdmi-off";
> > +	};
> > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
> > index a74b37b..d50a505 100644
> > --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
> > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
> > @@ -195,3 +195,98 @@ Example:
> >  		power-domains = <&pd_audio>;
> >  		...
> >  	};
> > +
> > +== Pad Control Nodes ==  
> 
> Similar comments in this file.
> 
> > +
> > +The PMC can be used to set pad power state and voltage configuration.
> > +This functionality is present on SoCs from Tegra124 onwards. The pad
> > +configuration is done via the pinctrl framework. The driver implements
> > +power-source, low-power-enable, and low-power-disable pinconf pin
> > +configuration node properties. Each pinctrl pin corresponds to a single
> > +Tegra PMC pad. Thus, in the following sections of this document pin
> > +refers to the pinctrl frameworks notion of a Tegra PMC pad.
> > +
> > +The pad configuration state nodes are placed under the pmc node and they
> > +are referred to by the pinctrl client device properties. For more
> > +information see the examples presented later and
> > +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
> > +
> > +The values accepted by power-source property are
> > +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
> > +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
> > +
> > +Following pinctrl pin name strings are present on Tegra124 and Tegra132:
> > +audio		bb		cam		comp
> > +csia		csb		cse		dsi
> > +dsib		dsic		dsid		hdmi
> > +hsic		hv		lvds		mipi-bias
> > +nand		pex-bias	pex-clk1	pex-clk2
> > +pex-cntrl	sdmmc1		sdmmc3		sdmmc4
> > +sys_ddc		uart		usb0		usb1
> > +usb2		usb_bias
> > +
> > +All of the listed Tegra124 and Tegra132 pins support the
> > +low-power-enable and low-power-disable properties. None of the pins
> > +support the power-source property.
> > +
> > +Following pinctrl pin name strings are present on Tegra210:
> > +audio		audio-hv	cam		csia
> > +csib		csic		csid		csie
> > +csif		dbg		debug-nonao	dmic
> > +dp		dsi		dsib		dsic
> > +dsid		emmc		emmc2		gpio
> > +hdmi		hsic		lvds		mipi-bias
> > +pex-bias	pex-clk1	pex-clk2	pex-cntrl
> > +sdmmc1		sdmmc3		spi		spi-hv
> > +uart		usb0		usb1		usb2
> > +usb3		usb-bias
> > +
> > +All of the listed Tegra210 pins except pex-cntrl support the
> > +low-power-enable and low-power-disable properties. The power-source
> > +property is supported following Tegra210 pins: audio, audio-hv, cam,
> > +dbg, dmic, gpio, pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart.
> > +
> > +Pad configuration state example:
> > +	pmc: pmc@7000e400 {
> > +		compatible = "nvidia,tegra210-pmc";
> > +		reg = <0x0 0x7000e400 0x0 0x400>;
> > +		clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
> > +		clock-names = "pclk", "clk32k_in";
> > +
> > +		...
> > +
> > +		sdmmc1_3v3: sdmmc1-3v3 {
> > +			pins = "sdmmc1";
> > +			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
> > +		};
> > +
> > +		sdmmc1_1v8: sdmmc1-1v8 {
> > +			pins = "sdmmc1";
> > +			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
> > +		};
> > +
> > +		hdmi_off: hdmi-off {
> > +			pins = "hdmi";
> > +			low-power-enable;
> > +		}
> > +
> > +		hdmi_on: hdmi-on {
> > +			pins = "hdmi";
> > +			low-power-disable;
> > +		}
> > +	};
> > +
> > +Pinctrl client example:
> > +	sdmmc1: sdhci@700b0000 {
> > +		...
> > +		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> > +		pinctrl-0 = <&sdmmc1_3v3>;
> > +		pinctrl-1 = <&sdmmc1_1v8>;
> > +	};
> > +	...
> > +	sor@54540000 {
> > +		...
> > +		pinctrl-0 = <&hdmi_off>;
> > +		pinctrl-1 = <&hdmi_on>;
> > +		pinctrl-names = "hdmi-on", "hdmi-off";
> > +	};
> > diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> > new file mode 100644
> > index 0000000..20f4340
> > --- /dev/null
> > +++ b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> > @@ -0,0 +1,18 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * pinctrl-tegra-io-pad.h: Tegra I/O pad source voltage configuration constants
> > + * pinctrl bindings.
> > + *
> > + * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
> > + *
> > + * Author: Aapo Vienamo <avienamo@nvidia.com>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
> > +#define _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
> > +
> > +/* Voltage levels of the I/O pad's source rail */
> > +#define TEGRA_IO_PAD_VOLTAGE_1V8	0
> > +#define TEGRA_IO_PAD_VOLTAGE_3V3	1
> > +
> > +#endif
> > -- 
> > 2.7.4
> >   

 -Aapo
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Rob Herring (Arm) July 17, 2018, 2:22 p.m. UTC | #3
On Tue, Jul 17, 2018 at 6:23 AM Aapo Vienamo <avienamo@nvidia.com> wrote:
>
> On Mon, 16 Jul 2018 09:43:09 -0600
> Rob Herring <robh@kernel.org> wrote:
>
> > On Thu, Jul 12, 2018 at 03:00:11PM +0300, Aapo Vienamo wrote:
> > > Document the pinctrl bindings used by the PMC driver for performing pad
> > > configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt
> > > are modified as they both cover SoC generations for which these bindings
> > > apply.
> > >
> > > Add a header defining Tegra PMC pad voltage configurations.
> > >
> > > Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> > > Acked-by: Jon Hunter <jonathanh@nvidia.com>
> > > ---
> > >  .../bindings/arm/tegra/nvidia,tegra186-pmc.txt     | 84 +++++++++++++++++++
> > >  .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      | 95 ++++++++++++++++++++++
> > >  include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 ++++
> > >  3 files changed, 197 insertions(+)
> > >  create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> > >
> > > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > index 5a3bf7c..9528f41 100644
> > > --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > @@ -34,3 +34,87 @@ Board DTS:
> > >     pmc@c360000 {
> > >             nvidia,invert-interrupt;
> > >     };
> > > +
> > > +== Pad Control Nodes ==
> > > +
> > > +The PMC can be used to set pad power state and voltage configuration.
> > > +The pad configuration is done via the pinctrl framework. The driver
> > > +implements power-source, low-power-enable, and low-power-disable pinconf
> > > +pin configuration node properties. Each pinctrl pin corresponds to a
> > > +single Tegra PMC pad. Thus, in the following sections of this document
> > > +pin refers to the pinctrl frameworks notion of a Tegra PMC pad.
> >
> > "pinctrl framework" is Linux specific and doesn't belong in the binding.
> > Neither does what a driver supports. Describe what the h/w supports.
> >
> > > +
> > > +The pad configuration state nodes are placed under the pmc node and they
> > > +are referred to by the pinctrl client device properties. For more
> >
> > Another driver detail not relevant.
> >
> > > +information see the examples presented later and
> >
> > examples don't document bindings. The documentation should be complete
> > without examples.
> >
> > > +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
> > > +
> > > +The values accepted by power-source property are
> > > +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
> > > +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
> >
> > You need to list out what properties the child nodes can have.
> >
> > power-source needs a vendor prefix.
>
> Isn't it a generic pinctrl property?

I don't know offhand. Doesn't look like it if you have custom values.

Rob
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Aapo Vienamo July 17, 2018, 3:30 p.m. UTC | #4
On Tue, 17 Jul 2018 08:22:07 -0600
Rob Herring <robh@kernel.org> wrote:

> On Tue, Jul 17, 2018 at 6:23 AM Aapo Vienamo <avienamo@nvidia.com> wrote:
> >
> > On Mon, 16 Jul 2018 09:43:09 -0600
> > Rob Herring <robh@kernel.org> wrote:
> >  
> > > On Thu, Jul 12, 2018 at 03:00:11PM +0300, Aapo Vienamo wrote:  
> > > > Document the pinctrl bindings used by the PMC driver for performing pad
> > > > configuration. Both nvidia,tegra186-pmc.txt and nvidia,tegra20-pmc.txt
> > > > are modified as they both cover SoC generations for which these bindings
> > > > apply.
> > > >
> > > > Add a header defining Tegra PMC pad voltage configurations.
> > > >
> > > > Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> > > > Acked-by: Jon Hunter <jonathanh@nvidia.com>
> > > > ---
> > > >  .../bindings/arm/tegra/nvidia,tegra186-pmc.txt     | 84 +++++++++++++++++++
> > > >  .../bindings/arm/tegra/nvidia,tegra20-pmc.txt      | 95 ++++++++++++++++++++++
> > > >  include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h | 18 ++++
> > > >  3 files changed, 197 insertions(+)
> > > >  create mode 100644 include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > > index 5a3bf7c..9528f41 100644
> > > > --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > > +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
> > > > @@ -34,3 +34,87 @@ Board DTS:
> > > >     pmc@c360000 {
> > > >             nvidia,invert-interrupt;
> > > >     };
> > > > +
> > > > +== Pad Control Nodes ==
> > > > +
> > > > +The PMC can be used to set pad power state and voltage configuration.
> > > > +The pad configuration is done via the pinctrl framework. The driver
> > > > +implements power-source, low-power-enable, and low-power-disable pinconf
> > > > +pin configuration node properties. Each pinctrl pin corresponds to a
> > > > +single Tegra PMC pad. Thus, in the following sections of this document
> > > > +pin refers to the pinctrl frameworks notion of a Tegra PMC pad.  
> > >
> > > "pinctrl framework" is Linux specific and doesn't belong in the binding.
> > > Neither does what a driver supports. Describe what the h/w supports.
> > >  
> > > > +
> > > > +The pad configuration state nodes are placed under the pmc node and they
> > > > +are referred to by the pinctrl client device properties. For more  
> > >
> > > Another driver detail not relevant.
> > >  
> > > > +information see the examples presented later and  
> > >
> > > examples don't document bindings. The documentation should be complete
> > > without examples.
> > >  
> > > > +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
> > > > +
> > > > +The values accepted by power-source property are
> > > > +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
> > > > +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.  
> > >
> > > You need to list out what properties the child nodes can have.
> > >
> > > power-source needs a vendor prefix.  
> >
> > Isn't it a generic pinctrl property?  
> 
> I don't know offhand. Doesn't look like it if you have custom values.

It's listed under "Supported generic properties" in
pinctrl-bindings.txt. The convention seems to be not to add a vendor
prefix even though such custom macro values are used. The property is
currently used by qcom,pmic-gpio, qcom,pmic-mpp, and renesas,pfc-pinctrl.
I could not find a bindings document describing it with a vendor prefix.

 -Aapo
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Jon Hunter July 20, 2018, 11:16 a.m. UTC | #5
Adding Linus ...

On 17/07/18 16:30, Aapo Vienamo wrote:

...

>>>>> +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
>>>>> +
>>>>> +The values accepted by power-source property are
>>>>> +TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
>>>>> +in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.  
>>>>
>>>> You need to list out what properties the child nodes can have.
>>>>
>>>> power-source needs a vendor prefix.  
>>>
>>> Isn't it a generic pinctrl property?  
>>
>> I don't know offhand. Doesn't look like it if you have custom values.
> 
> It's listed under "Supported generic properties" in
> pinctrl-bindings.txt. The convention seems to be not to add a vendor
> prefix even though such custom macro values are used. The property is
> currently used by qcom,pmic-gpio, qcom,pmic-mpp, and renesas,pfc-pinctrl.
> I could not find a bindings document describing it with a vendor prefix.
Looking at other users of the 'power-source' property it is not clear to
me if the values should/can be vendor specific or not. I see cases where
some people use definitions and others use actual voltages. 

Linus, any recommendations here?

Cheers
Jon
Linus Walleij July 29, 2018, 8:54 p.m. UTC | #6
On Fri, Jul 20, 2018 at 1:16 PM Jon Hunter <jonathanh@nvidia.com> wrote:

> Adding Linus ...

OMG this sounds bad.

> >> I don't know offhand. Doesn't look like it if you have custom values.
> >
> > It's listed under "Supported generic properties" in
> > pinctrl-bindings.txt. The convention seems to be not to add a vendor
> > prefix even though such custom macro values are used. The property is
> > currently used by qcom,pmic-gpio, qcom,pmic-mpp, and renesas,pfc-pinctrl.
> > I could not find a bindings document describing it with a vendor prefix.
>
> Looking at other users of the 'power-source' property it is not clear to
> me if the values should/can be vendor specific or not. I see cases where
> some people use definitions and others use actual voltages.
>
> Linus, any recommendations here?

It's a bit of imperfect world here.

I always imagines it was some kind of enumerator
like source A, B or C... so 0, 1 defined in sime include/dt-bindings/*
would make most sense to me.

In general, use SI-units if you can, else use something that makes
sense for the people writing the device tree. These enumerators
seems to make sense.

If nothing makes any sense, maybe a custom property makes it
make sense.

Yours,
Linus Walleij
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diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
index 5a3bf7c..9528f41 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt
@@ -34,3 +34,87 @@  Board DTS:
 	pmc@c360000 {
 		nvidia,invert-interrupt;
 	};
+
+== Pad Control Nodes ==
+
+The PMC can be used to set pad power state and voltage configuration.
+The pad configuration is done via the pinctrl framework. The driver
+implements power-source, low-power-enable, and low-power-disable pinconf
+pin configuration node properties. Each pinctrl pin corresponds to a
+single Tegra PMC pad. Thus, in the following sections of this document
+pin refers to the pinctrl frameworks notion of a Tegra PMC pad.
+
+The pad configuration state nodes are placed under the pmc node and they
+are referred to by the pinctrl client device properties. For more
+information see the examples presented later and
+Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
+
+The values accepted by power-source property are
+TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
+in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
+
+Following pinctrl pin name strings are present on Tegra186:
+csia		csib		dsi		mipi-bias
+pex-clk-bias	pex-clk3	pex-clk2	pex-clk1
+usb0		usb1		usb2		usb-bias
+uart		audio		hsic		dbg
+hdmi-dp0	hdmi-dp1	pex-cntrl	sdmmc2-hv
+sdmmc4		cam		dsib		dsic
+dsid		csic		csid		csie
+dsif		spi		ufs		dmic-hv
+edp		sdmmc1-hv	sdmmc3-hv	conn
+audio-hv	ao-hv
+
+All of the listed Tegra186 pins except ao-hv support the
+low-power-enable and low-power-disable properties. The power-source
+property is supported following Tegra210 pins: sdmmc2-hv, dmic-hv,
+sdmmc1-hv, sdmmc3-hv, audio-hv, ao-hv.
+
+Pad configuration state example:
+	pmc: pmc@7000e400 {
+		compatible = "nvidia,tegra186-pmc";
+		reg = <0 0x0c360000 0 0x10000>,
+		      <0 0x0c370000 0 0x10000>,
+		      <0 0x0c380000 0 0x10000>,
+		      <0 0x0c390000 0 0x10000>;
+		reg-names = "pmc", "wake", "aotag", "scratch";
+
+		...
+
+		sdmmc1_3v3: sdmmc1-3v3 {
+			pins = "sdmmc1-hv";
+			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+		};
+
+		sdmmc1_1v8: sdmmc1-1v8 {
+			pins = "sdmmc1-hv";
+			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+		};
+
+		hdmi_off: hdmi-off {
+			pins = "hdmi";
+			low-power-enable;
+		}
+
+		hdmi_on: hdmi-on {
+			pins = "hdmi";
+			low-power-disable;
+		}
+	};
+
+Pinctrl client example:
+	sdmmc1: sdhci@3400000 {
+		...
+		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+		pinctrl-0 = <&sdmmc1_3v3>;
+		pinctrl-1 = <&sdmmc1_1v8>;
+	};
+
+	...
+
+	sor0: sor@15540000 {
+		...
+		pinctrl-0 = <&hdmi_off>;
+		pinctrl-1 = <&hdmi_on>;
+		pinctrl-names = "hdmi-on", "hdmi-off";
+	};
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index a74b37b..d50a505 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -195,3 +195,98 @@  Example:
 		power-domains = <&pd_audio>;
 		...
 	};
+
+== Pad Control Nodes ==
+
+The PMC can be used to set pad power state and voltage configuration.
+This functionality is present on SoCs from Tegra124 onwards. The pad
+configuration is done via the pinctrl framework. The driver implements
+power-source, low-power-enable, and low-power-disable pinconf pin
+configuration node properties. Each pinctrl pin corresponds to a single
+Tegra PMC pad. Thus, in the following sections of this document pin
+refers to the pinctrl frameworks notion of a Tegra PMC pad.
+
+The pad configuration state nodes are placed under the pmc node and they
+are referred to by the pinctrl client device properties. For more
+information see the examples presented later and
+Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
+
+The values accepted by power-source property are
+TEGRA_IO_PAD_VOLTAGE_1V8 and TEGRA_IO_PAD_VOLTAGE_3V3, which are defined
+in dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
+
+Following pinctrl pin name strings are present on Tegra124 and Tegra132:
+audio		bb		cam		comp
+csia		csb		cse		dsi
+dsib		dsic		dsid		hdmi
+hsic		hv		lvds		mipi-bias
+nand		pex-bias	pex-clk1	pex-clk2
+pex-cntrl	sdmmc1		sdmmc3		sdmmc4
+sys_ddc		uart		usb0		usb1
+usb2		usb_bias
+
+All of the listed Tegra124 and Tegra132 pins support the
+low-power-enable and low-power-disable properties. None of the pins
+support the power-source property.
+
+Following pinctrl pin name strings are present on Tegra210:
+audio		audio-hv	cam		csia
+csib		csic		csid		csie
+csif		dbg		debug-nonao	dmic
+dp		dsi		dsib		dsic
+dsid		emmc		emmc2		gpio
+hdmi		hsic		lvds		mipi-bias
+pex-bias	pex-clk1	pex-clk2	pex-cntrl
+sdmmc1		sdmmc3		spi		spi-hv
+uart		usb0		usb1		usb2
+usb3		usb-bias
+
+All of the listed Tegra210 pins except pex-cntrl support the
+low-power-enable and low-power-disable properties. The power-source
+property is supported following Tegra210 pins: audio, audio-hv, cam,
+dbg, dmic, gpio, pex-cntrl, sdmmc1, sdmmc3, spi, spi-hv, and uart.
+
+Pad configuration state example:
+	pmc: pmc@7000e400 {
+		compatible = "nvidia,tegra210-pmc";
+		reg = <0x0 0x7000e400 0x0 0x400>;
+		clocks = <&tegra_car TEGRA210_CLK_PCLK>, <&clk32k_in>;
+		clock-names = "pclk", "clk32k_in";
+
+		...
+
+		sdmmc1_3v3: sdmmc1-3v3 {
+			pins = "sdmmc1";
+			power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+		};
+
+		sdmmc1_1v8: sdmmc1-1v8 {
+			pins = "sdmmc1";
+			power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+		};
+
+		hdmi_off: hdmi-off {
+			pins = "hdmi";
+			low-power-enable;
+		}
+
+		hdmi_on: hdmi-on {
+			pins = "hdmi";
+			low-power-disable;
+		}
+	};
+
+Pinctrl client example:
+	sdmmc1: sdhci@700b0000 {
+		...
+		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+		pinctrl-0 = <&sdmmc1_3v3>;
+		pinctrl-1 = <&sdmmc1_1v8>;
+	};
+	...
+	sor@54540000 {
+		...
+		pinctrl-0 = <&hdmi_off>;
+		pinctrl-1 = <&hdmi_on>;
+		pinctrl-names = "hdmi-on", "hdmi-off";
+	};
diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
new file mode 100644
index 0000000..20f4340
--- /dev/null
+++ b/include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h
@@ -0,0 +1,18 @@ 
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * pinctrl-tegra-io-pad.h: Tegra I/O pad source voltage configuration constants
+ * pinctrl bindings.
+ *
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Author: Aapo Vienamo <avienamo@nvidia.com>
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
+#define _DT_BINDINGS_PINCTRL_TEGRA_IO_PAD_H
+
+/* Voltage levels of the I/O pad's source rail */
+#define TEGRA_IO_PAD_VOLTAGE_1V8	0
+#define TEGRA_IO_PAD_VOLTAGE_3V3	1
+
+#endif