diff mbox series

[U-Boot,v2] arm: socfpga: Fixes: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET

Message ID 1531393940-12506-1-git-send-email-ley.foon.tan@intel.com
State Changes Requested
Delegated to: Marek Vasut
Headers show
Series [U-Boot,v2] arm: socfpga: Fixes: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET | expand

Commit Message

Ley Foon Tan July 12, 2018, 11:12 a.m. UTC
Commit bfc6bae8fa1f2d8a9c51548767b02f1a1e0ffe52

This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update
with new CONFIG name.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>

---
v2:
- Rename commit title, add "Fixes:" tag
- Add Acked-by from Marek
---
 arch/arm/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Marek Vasut July 12, 2018, 7:23 a.m. UTC | #1
On 07/12/2018 01:12 PM, Ley Foon Tan wrote:
> Commit bfc6bae8fa1f2d8a9c51548767b02f1a1e0ffe52
> 
> This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update
> with new CONFIG name.
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> Acked-by: Marek Vasut <marex@denx.de>
> 
> ---
> v2:
> - Rename commit title, add "Fixes:" tag
> - Add Acked-by from Marek
> ---
>  arch/arm/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 35b6ea2..4c60538 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -754,6 +754,7 @@ config ARCH_SOCFPGA
>  	select DM_SERIAL
>  	select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
>  	select OF_CONTROL
> +	select SPL_DM_RESET
>  	select SPL_LIBCOMMON_SUPPORT
>  	select SPL_LIBDISK_SUPPORT
>  	select SPL_LIBGENERIC_SUPPORT
> @@ -762,7 +763,6 @@ config ARCH_SOCFPGA
>  	select SPL_OF_CONTROL
>  	select SPL_SERIAL_SUPPORT
>  	select SPL_DM_SERIAL
> -	select SPL_RESET_SUPPORT
>  	select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
>  	select SPL_SPI_SUPPORT if DM_SPI
>  	select SPL_WATCHDOG_SUPPORT
> 
Applied, thanks
Marek Vasut July 12, 2018, 2:04 p.m. UTC | #2
On 07/12/2018 01:12 PM, Ley Foon Tan wrote:
> Commit bfc6bae8fa1f2d8a9c51548767b02f1a1e0ffe52
> 
> This commit rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET. Update
> with new CONFIG name.
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> Acked-by: Marek Vasut <marex@denx.de>
> 
> ---
> v2:
> - Rename commit title, add "Fixes:" tag
> - Add Acked-by from Marek
> ---
>  arch/arm/Kconfig | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 35b6ea2..4c60538 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -754,6 +754,7 @@ config ARCH_SOCFPGA
>  	select DM_SERIAL
>  	select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
>  	select OF_CONTROL
> +	select SPL_DM_RESET
>  	select SPL_LIBCOMMON_SUPPORT
>  	select SPL_LIBDISK_SUPPORT
>  	select SPL_LIBGENERIC_SUPPORT
> @@ -762,7 +763,6 @@ config ARCH_SOCFPGA
>  	select SPL_OF_CONTROL
>  	select SPL_SERIAL_SUPPORT
>  	select SPL_DM_SERIAL
> -	select SPL_RESET_SUPPORT
>  	select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
>  	select SPL_SPI_SUPPORT if DM_SPI
>  	select SPL_WATCHDOG_SUPPORT
> 

This broke Arria10, dropped

       arm:  +   socfpga_arria10
+arch/arm/dts/socfpga_arria10_socdk_sdmmc.dtb: Warning
(avoid_unnecessary_addr_size): /clocks: unnecessary
#address-cells/#size-cells without "ranges" or child "reg" property
+drivers/built-in.o: In function `ns16550_serial_probe':
+drivers/serial/ns16550.c:378: undefined reference to `reset_get_bulk'
+drivers/serial/ns16550.c:380: undefined reference to `reset_deassert_bulk'
+make[2]: *** [spl/u-boot-spl] Error 1
+make[1]: *** [spl/u-boot-spl] Error 2
+make: *** [sub-make] Error 2

Can you please at least do basic compile tests before submitting the
patches ?
diff mbox series

Patch

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 35b6ea2..4c60538 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -754,6 +754,7 @@  config ARCH_SOCFPGA
 	select DM_SERIAL
 	select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
 	select OF_CONTROL
+	select SPL_DM_RESET
 	select SPL_LIBCOMMON_SUPPORT
 	select SPL_LIBDISK_SUPPORT
 	select SPL_LIBGENERIC_SUPPORT
@@ -762,7 +763,6 @@  config ARCH_SOCFPGA
 	select SPL_OF_CONTROL
 	select SPL_SERIAL_SUPPORT
 	select SPL_DM_SERIAL
-	select SPL_RESET_SUPPORT
 	select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
 	select SPL_SPI_SUPPORT if DM_SPI
 	select SPL_WATCHDOG_SUPPORT