| Message ID | 20180702034133.12511-3-rth@twiddle.net |
|---|---|
| State | New |
| Headers | show |
| Series | Add movprfx patterns and alternatives | expand |
Richard Henderson <rth@twiddle.net> writes: > The predicate is present within the containing UNSPEC_SEL; > there is no need to duplicate it. > > * config/aarch64/aarch64-sve.md (cond_<SVE_COND_FP_BINARY><SVE_F>): > Remove match_dup 1 from the inner unspec. > (*cond_<SVE_COND_FP_BINARY><SVE_F>): Likewise. OK, thanks. Richard > --- > gcc/config/aarch64/aarch64-sve.md | 9 +++------ > 1 file changed, 3 insertions(+), 6 deletions(-) > > diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md > index 3dee6a4376d..2aceef65c80 100644 > --- a/gcc/config/aarch64/aarch64-sve.md > +++ b/gcc/config/aarch64/aarch64-sve.md > @@ -2677,8 +2677,7 @@ > (unspec:SVE_F > [(match_operand:<VPRED> 1 "register_operand") > (unspec:SVE_F > - [(match_dup 1) > - (match_operand:SVE_F 2 "register_operand") > + [(match_operand:SVE_F 2 "register_operand") > (match_operand:SVE_F 3 "register_operand")] > SVE_COND_FP_BINARY) > (match_operand:SVE_F 4 "register_operand")] > @@ -2694,8 +2693,7 @@ > (unspec:SVE_F > [(match_operand:<VPRED> 1 "register_operand" "Upl") > (unspec:SVE_F > - [(match_dup 1) > - (match_operand:SVE_F 2 "register_operand" "0") > + [(match_operand:SVE_F 2 "register_operand" "0") > (match_operand:SVE_F 3 "register_operand" "w")] > SVE_COND_FP_BINARY) > (match_dup 2)] > @@ -2710,8 +2708,7 @@ > (unspec:SVE_F > [(match_operand:<VPRED> 1 "register_operand" "Upl") > (unspec:SVE_F > - [(match_dup 1) > - (match_operand:SVE_F 2 "register_operand" "w") > + [(match_operand:SVE_F 2 "register_operand" "w") > (match_operand:SVE_F 3 "register_operand" "0")] > SVE_COND_FP_BINARY) > (match_dup 3)]
diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 3dee6a4376d..2aceef65c80 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -2677,8 +2677,7 @@ (unspec:SVE_F [(match_operand:<VPRED> 1 "register_operand") (unspec:SVE_F - [(match_dup 1) - (match_operand:SVE_F 2 "register_operand") + [(match_operand:SVE_F 2 "register_operand") (match_operand:SVE_F 3 "register_operand")] SVE_COND_FP_BINARY) (match_operand:SVE_F 4 "register_operand")] @@ -2694,8 +2693,7 @@ (unspec:SVE_F [(match_operand:<VPRED> 1 "register_operand" "Upl") (unspec:SVE_F - [(match_dup 1) - (match_operand:SVE_F 2 "register_operand" "0") + [(match_operand:SVE_F 2 "register_operand" "0") (match_operand:SVE_F 3 "register_operand" "w")] SVE_COND_FP_BINARY) (match_dup 2)] @@ -2710,8 +2708,7 @@ (unspec:SVE_F [(match_operand:<VPRED> 1 "register_operand" "Upl") (unspec:SVE_F - [(match_dup 1) - (match_operand:SVE_F 2 "register_operand" "w") + [(match_operand:SVE_F 2 "register_operand" "w") (match_operand:SVE_F 3 "register_operand" "0")] SVE_COND_FP_BINARY) (match_dup 3)]