Message ID | 1528637487-25172-1-git-send-email-martin@kaiser.cx |
---|---|
State | Changes Requested |
Delegated to: | Miquel Raynal |
Headers | show |
Series | [v2] mtd: rawnand: mxc: set spare area size register explicitly | expand |
Hi Martin, On Sun, 10 Jun 2018 15:31:27 +0200, Martin Kaiser <martin@kaiser.cx> wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the controller when it calculates the ECC bytes internally in > hardware. > > Usually, this register is updated from settings in the IIM fuses when > the system is booting from NAND flash. For other boot media, however, > the SPAS register remains at the default setting, which may not work for > the particular flash chip on the board. The same goes for flash chips > whose configuration cannot be set in the IIM fuses (e.g. chips with 2k > sector size and 128 bytes spare area size can't be configured in the IIM > fuses on imx25 systems). > > Set the SPAS register explicitly during the preset operation. Derive the > register value from mtd->oobsize that was detected during probe by > decoding the flash chip's ID bytes. > > While at it, rename the define for the spare area register's offset to > NFC_V21_RSLTSPARE_AREA. The register at offset 0x10 on v1 controllers is > different from the register on v21 controllers. > > Signed-off-by: Martin Kaiser <martin@kaiser.cx> > Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> > Cc: stable@vger.kernel.org > --- Thanks, I'm ok with the patch, I'll queue it to nand/next. > changes in v2 > - fix the commit message > - use '/ 2' instead of shift operator for division > > BTW is it ok to keep a Reviewed-by tag when updating the patch? I think so, at least for such minor updates it is okay :) Regards, Miquèl
Hi Martin, On Sun, 10 Jun 2018 15:31:27 +0200 Martin Kaiser <martin@kaiser.cx> wrote: > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the controller when it calculates the ECC bytes internally in > hardware. > > Usually, this register is updated from settings in the IIM fuses when > the system is booting from NAND flash. For other boot media, however, > the SPAS register remains at the default setting, which may not work for > the particular flash chip on the board. The same goes for flash chips > whose configuration cannot be set in the IIM fuses (e.g. chips with 2k > sector size and 128 bytes spare area size can't be configured in the IIM > fuses on imx25 systems). > > Set the SPAS register explicitly during the preset operation. Derive the > register value from mtd->oobsize that was detected during probe by > decoding the flash chip's ID bytes. > > While at it, rename the define for the spare area register's offset to > NFC_V21_RSLTSPARE_AREA. The register at offset 0x10 on v1 controllers is > different from the register on v21 controllers. > > Signed-off-by: Martin Kaiser <martin@kaiser.cx> > Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> > Cc: stable@vger.kernel.org Hm, a Cc-stable tag without its associated Fixes tag, I don't like that. Can you find which commit introduced this bug? Thanks, Boris
Hi Boris, Thus wrote Boris Brezillon (boris.brezillon@bootlin.com): > > Signed-off-by: Martin Kaiser <martin@kaiser.cx> > > Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> > > Cc: stable@vger.kernel.org > Hm, a Cc-stable tag without its associated Fixes tag, I don't like that. > Can you find which commit introduced this bug? the particular corner case that I fixed has never really worked. As my fix updates the preset operation, I'd suggest adding a Fixes tag pointing at the first commit that introduced the preset operation. I'll resend my patch with this tag added. Best regards, Martin
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c index 45786e7..26cef21 100644 --- a/drivers/mtd/nand/raw/mxc_nand.c +++ b/drivers/mtd/nand/raw/mxc_nand.c @@ -48,7 +48,7 @@ #define NFC_V1_V2_CONFIG (host->regs + 0x0a) #define NFC_V1_V2_ECC_STATUS_RESULT (host->regs + 0x0c) #define NFC_V1_V2_RSLTMAIN_AREA (host->regs + 0x0e) -#define NFC_V1_V2_RSLTSPARE_AREA (host->regs + 0x10) +#define NFC_V21_RSLTSPARE_AREA (host->regs + 0x10) #define NFC_V1_V2_WRPROT (host->regs + 0x12) #define NFC_V1_UNLOCKSTART_BLKADDR (host->regs + 0x14) #define NFC_V1_UNLOCKEND_BLKADDR (host->regs + 0x16) @@ -1274,6 +1274,9 @@ static void preset_v2(struct mtd_info *mtd) writew(config1, NFC_V1_V2_CONFIG1); /* preset operation */ + /* spare area size in 16-bit half-words */ + writew(mtd->oobsize / 2, NFC_V21_RSLTSPARE_AREA); + /* Unlock the internal RAM Buffer */ writew(0x2, NFC_V1_V2_CONFIG);