@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
-COBJS := smdk2410.o flash.o
+COBJS := smdk2410.o
SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
deleted file mode 100644
@@ -1,25 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-#
-# SAMSUNG SMDK2410 board with S3C2410X (ARM920T) cpu
-#
-# see http://www.samsung.com/ for more information on SAMSUNG
-#
-
-#
-# SMDK2410 has 1 bank of 64 MB DRAM
-#
-# 3000'0000 to 3400'0000
-#
-# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
-# optionally with a ramdisk at 3080'0000
-#
-# we load ourself to 33F8'0000
-#
-# download area is 3300'0000
-#
-
-
-CONFIG_SYS_TEXT_BASE = 0x33F80000
deleted file mode 100644
@@ -1,433 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-ulong myflush (void);
-
-
-#define FLASH_BANK_SIZE PHYS_FLASH_SIZE
-#define MAIN_SECT_SIZE 0x10000 /* 64 KB */
-
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-
-
-#define CMD_READ_ARRAY 0x000000F0
-#define CMD_UNLOCK1 0x000000AA
-#define CMD_UNLOCK2 0x00000055
-#define CMD_ERASE_SETUP 0x00000080
-#define CMD_ERASE_CONFIRM 0x00000030
-#define CMD_PROGRAM 0x000000A0
-#define CMD_UNLOCK_BYPASS 0x00000020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 1)))
-
-#define BIT_ERASE_DONE 0x00000080
-#define BIT_RDY_MASK 0x00000080
-#define BIT_PROGRAM_ERROR 0x00000020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-/*-----------------------------------------------------------------------
- */
-
-ulong flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
-#if defined(CONFIG_AMD_LV400)
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV400B & FLASH_TYPEMASK);
-#elif defined(CONFIG_AMD_LV800)
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_LV800B & FLASH_TYPEMASK);
-#else
-#error "Unknown flash configured"
-#endif
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured too many flash banks!\n");
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j <= 3) {
- /* 1st one is 16 KB */
- if (j == 0) {
- flash_info[i].start[j] =
- flashbase + 0;
- }
-
- /* 2nd and 3rd are both 8 KB */
- if ((j == 1) || (j == 2)) {
- flash_info[i].start[j] =
- flashbase + 0x4000 + (j -
- 1) *
- 0x2000;
- }
-
- /* 4th 32 KB */
- if (j == 3) {
- flash_info[i].start[j] =
- flashbase + 0x8000;
- }
- } else {
- flash_info[i].start[j] =
- flashbase + (j - 3) * MAIN_SECT_SIZE;
- }
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_SYS_FLASH_BASE,
- CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
- &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CONFIG_ENV_ADDR,
- CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
-
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_LV400B & FLASH_TYPEMASK):
- printf ("1x Amd29LV400BB (4Mbit)\n");
- break;
- case (AMD_ID_LV800B & FLASH_TYPEMASK):
- printf ("1x Amd29LV800BB (8Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:;
-}
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ushort result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- if (info->protect[sect] == 0) { /* not protected */
- vu_short *addr = (vu_short *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () >
- CONFIG_SYS_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip = TMO;
- break;
- }
-
- if (!chip
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip = READY;
-
- if (!chip
- && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
- chip = ERR;
-
- } while (!chip);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- udelay_masked (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash
- */
-
-static int write_hword (flash_info_t * info, ulong dest, ushort data)
-{
- vu_short *addr = (vu_short *) dest;
- ushort result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
- *addr = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait until flash is ready */
- chip = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
- chip = ERR | TMO;
- break;
- }
- if (!chip && ((result & 0x80) == (data & 0x80)))
- chip = READY;
-
- if (!chip && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) {
- result = *addr;
-
- if ((result & 0x80) == (data & 0x80))
- chip = READY;
- else
- chip = ERR;
- }
-
- } while (!chip);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash.
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- int l;
- int i, rc;
- ushort data;
-
- wp = (addr & ~1); /* get lower word aligned address */
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
- for (; i < 2 && cnt > 0; ++i) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- if ((rc = write_hword (info, wp, data)) != 0) {
- return (rc);
- }
- wp += 2;
- }
-
- /*
- * handle word aligned part
- */
- while (cnt >= 2) {
- data = *((vu_short *) src);
- if ((rc = write_hword (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 0) {
- return ERR_OK;
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
- data = (data >> 8) | (*src++ << 8);
- --cnt;
- }
- for (; i < 2; ++i, ++cp) {
- data = (data >> 8) | (*(uchar *) cp << 8);
- }
-
- return write_hword (info, wp, data);
-}
@@ -3,7 +3,7 @@
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
- * (C) Copyright 2002
+ * (C) Copyright 2002, 2010
* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
*
* See file CREDITS for list of people who contributed to this
@@ -27,6 +27,7 @@
#include <common.h>
#include <netdev.h>
+#include <asm/io.h>
#include <asm/arch/s3c24x0_cpu.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -55,7 +56,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define U_M_SDIV 0x2
#endif
-static inline void delay (unsigned long loops)
+static inline void pll_delay(unsigned long loops)
{
__asm__ volatile ("1:\n"
"subs %0, %1, #1\n"
@@ -66,44 +67,51 @@ static inline void delay (unsigned long loops)
* Miscellaneous platform dependent initialisations
*/
-int board_init (void)
+int board_early_init_f(void)
{
struct s3c24x0_clock_power * const clk_power =
s3c24x0_get_base_clock_power();
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* to reduce PLL lock time, adjust the LOCKTIME register */
- clk_power->locktime = 0xFFFFFF;
+ writel(0xFFFFFF, &clk_power->locktime);
/* configure MPLL */
- clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+ writel((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV,
+ &clk_power->mpllcon);
/* some delay between MPLL and UPLL */
- delay (4000);
+ pll_delay(4000);
/* configure UPLL */
- clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+ writel((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV,
+ &clk_power->upllcon);
/* some delay between MPLL and UPLL */
- delay (8000);
+ pll_delay(8000);
/* set up the I/O ports */
- gpio->gpacon = 0x007FFFFF;
- gpio->gpbcon = 0x00044555;
- gpio->gpbup = 0x000007FF;
- gpio->gpccon = 0xAAAAAAAA;
- gpio->gpcup = 0x0000FFFF;
- gpio->gpdcon = 0xAAAAAAAA;
- gpio->gpdup = 0x0000FFFF;
- gpio->gpecon = 0xAAAAAAAA;
- gpio->gpeup = 0x0000FFFF;
- gpio->gpfcon = 0x000055AA;
- gpio->gpfup = 0x000000FF;
- gpio->gpgcon = 0xFF95FFBA;
- gpio->gpgup = 0x0000FFFF;
- gpio->gphcon = 0x002AFAAA;
- gpio->gphup = 0x000007FF;
+ writel(0x007FFFFF, &gpio->gpacon);
+ writel(0x00044555, &gpio->gpbcon);
+ writel(0x000007FF, &gpio->gpbup);
+ writel(0xAAAAAAAA, &gpio->gpccon);
+ writel(0x0000FFFF, &gpio->gpcup);
+ writel(0xAAAAAAAA, &gpio->gpdcon);
+ writel(0x0000FFFF, &gpio->gpdup);
+ writel(0xAAAAAAAA, &gpio->gpecon);
+ writel(0x0000FFFF, &gpio->gpeup);
+ writel(0x000055AA, &gpio->gpfcon);
+ writel(0x000000FF, &gpio->gpfup);
+ writel(0xFF95FFBA, &gpio->gpgcon);
+ writel(0x0000FFFF, &gpio->gpgup);
+ writel(0x002AFAAA, &gpio->gphcon);
+ writel(0x000007FF, &gpio->gphup);
+
+ return 0;
+}
+int board_init(void)
+{
/* arch number of SMDK2410-Board */
gd->bd->bi_arch_number = MACH_TYPE_SMDK2410;
@@ -116,11 +124,10 @@ int board_init (void)
return 0;
}
-int dram_init (void)
+int dram_init(void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
+ /* dram_init must store complete ramsize in gd->ram_size */
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}
@@ -134,3 +141,15 @@ int board_eth_init(bd_t *bis)
return rc;
}
#endif
+
+/*
+ * Hardcoded flash setup:
+ * Flash 0 is a non-CFI AMD AM29LV800BB flash.
+ */
+ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
+{
+ info->portwidth = FLASH_CFI_16BIT;
+ info->chipwidth = FLASH_CFI_BY16;
+ info->interface = FLASH_CFI_X16;
+ return 1;
+}
@@ -33,22 +33,23 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
-#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
-#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
-#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
+#define CONFIG_ARM920T /* This is an ARM920T Core */
+#define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
+#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
+#define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
-/* input clock of PLL */
-#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */
+#define CONFIG_SYS_TEXT_BASE 0x0
+#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
-#define USE_920T_MMU 1
-#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
+#define CONFIG_SYS_CLK_FREQ 12000000
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
/*
* Hardware drivers
@@ -62,19 +63,24 @@
* select serial console configuration
*/
#define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
+
+/************************************************************
+ * USB support (currently only works with D-cache off)
+ ************************************************************/
+#define CONFIG_USB_OHCI
+#define CONFIG_USB_KEYBOARD
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
/************************************************************
* RTC
************************************************************/
-#define CONFIG_RTC_S3C24X0 1
+#define CONFIG_RTC_S3C24X0
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
-
/*
* BOOTP options
*/
@@ -83,52 +89,70 @@
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
-
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
+#define CONFIG_CMD_BSP
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ELF
-
-
-#define CONFIG_BOOTDELAY 3
-/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
-/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b */
-#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_USB
+
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+
+/* autoboot */
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOT_RETRY_TIME -1
+#define CONFIG_RESET_TO_RETRY
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 10.0.0.110
#define CONFIG_SERVERIP 10.0.0.1
-/*#define CONFIG_BOOTFILE "elinos-lart" */
-/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
-#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
* Miscellaneous configurable options
*/
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "SMDK2410 # " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_PROMPT "SMDK2410 # "
+#define CONFIG_SYS_CBSIZE 256
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
-#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
+#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
-#define CONFIG_SYS_LOAD_ADDR 0x33000000 /* default load address */
+#define CONFIG_SYS_LOAD_ADDR 0x30800000
#define CONFIG_SYS_HZ 1000
/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/* support additional compression methods */
+#define CONFIG_BZIP2
+#define CONFIG_LZO
+#define CONFIG_LZMA
+
/*-----------------------------------------------------------------------
* Stack sizes
*
@@ -143,40 +167,73 @@
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
-#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
-#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
-#if 0
-#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
-#endif
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_LEGACY
+#define CONFIG_SYS_FLASH_LEGACY_512Kx16
+#define CONFIG_FLASH_SHOW_PROGRESS 45
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#ifdef CONFIG_AMD_LV800
-#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
-#define CONFIG_SYS_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x0F0000) /* addr of environment */
-#endif
-#ifdef CONFIG_AMD_LV400
-#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
-#define CONFIG_SYS_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
-#endif
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
+#define CONFIG_SYS_MAX_FLASH_SECT (19)
+
+#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SIZE 0x10000
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
+/*
+ * Size of malloc() pool
+ * BZIP2 / LZO / LZMA need a lot of RAM
+ */
+#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
-#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
+#define CONFIG_SYS_MONITOR_LEN (448 * 1024)
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+
+/*
+ * NAND configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_S3C2410
+#define CONFIG_SYS_S3C2410_NAND_HWECC
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_SYS_NAND_BASE 0x4E000000
+#endif
+
+/*
+ * File system
+ */
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_YAFFS2
+#define CONFIG_RBTREE
+
+/* additions for new relocation code, must be added to all boards */
+#undef CONFIG_SYS_ARM_WITHOUT_RELOC
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+ GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_BOARD_EARLY_INIT_F
#endif /* __CONFIG_H */
This patch brings the SMDK2410 port in sync with the latest U-Boot version by doing the following: - do the necessary adjustments to support the ARM relocation feature - use the CFI flash driver (and removing the old one) - remove the unneeded config.mk file Signed-off-by: David Müller <d.mueller@elsoft.ch> --- Changes for V2: - deleted config.mk Changes for V3: - adjusted patch meta info