| Message ID | 20180530120327.27681-4-peron.clem@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | Reintroduce i.MX EPIT Timer | expand |
On Wed, May 30, 2018 at 02:03:25PM +0200, Clément Péron wrote: > From: Clément Peron <clement.peron@devialet.com> "dt-bindings: timer: ..." is the preferred subject prefix. > > Add devicetree binding document for NXP's i.MX SoC specific > EPIT timer driver. > > Signed-off-by: Clément Peron <clement.peron@devialet.com> > --- > .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt > > diff --git a/Documentation/devicetree/bindings/timer/fsl,imxepit.txt b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt > new file mode 100644 > index 000000000000..90112d58af10 > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt > @@ -0,0 +1,24 @@ > +Binding for the i.MX EPIT timer > + > +This binding uses the common clock binding[1]. > + > +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt No need to state this. Listing "clocks" tells us that. > + > +Required properties: > +- compatible: should be "fsl,imx31-epit" What about imx6q listed below? > +- reg: physical base address of the controller and length of memory mapped > + region. > +- interrupts: Should contain EPIT controller interrupt > +- clocks: list of clock specifiers, must contain an entry for each required > + entry in clock-names > +- clock-names : should include entries "ipg", "per" > + > +Example for i.MX6QDL: > + epit1: epit@20d0000 { timer@... > + compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; > + reg = <0x020d0000 0x4000>; > + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks IMX6QDL_CLK_IPG_PER>, > + <&clks IMX6QDL_CLK_EPIT1>; > + clock-names = "ipg", "per"; > + }; > -- > 2.17.0 >
Hi Clément, On 05/30/2018 03:03 PM, Clément Péron wrote: > From: Clément Peron <clement.peron@devialet.com> > > Add devicetree binding document for NXP's i.MX SoC specific > EPIT timer driver. > > Signed-off-by: Clément Peron <clement.peron@devialet.com> > --- > .../devicetree/bindings/timer/fsl,imxepit.txt | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/fsl,imxepit.txt > > diff --git a/Documentation/devicetree/bindings/timer/fsl,imxepit.txt b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt > new file mode 100644 > index 000000000000..90112d58af10 > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt > @@ -0,0 +1,24 @@ > +Binding for the i.MX EPIT timer > + > +This binding uses the common clock binding[1]. > + > +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt > + no, this leftover reference to clock-bindings.txt is invalid, please remove it. Instead you may add a simple description of the timer module. > +Required properties: > +- compatible: should be "fsl,imx31-epit" To satisfy compatibles with multiple SoCs, apparently you may follow a model, which is used with other Freescale controllers, for instance gpio/fsl-imx-gpio.txt - compatible : Should be "fsl,<soc>-gpio" mmc/fsl-imx-esdhc.txt - compatible : Should be "fsl,<chip>-esdhc" serial/fsl-imx-uart.txt - compatible : Should be "fsl,<soc>-uart" timer/fsl,imxgpt.txt - compatible : should be "fsl,<soc>-gpt" and so on, I hope it would cover Rob's ask. > +- reg: physical base address of the controller and length of memory mapped > + region. > +- interrupts: Should contain EPIT controller interrupt > +- clocks: list of clock specifiers, must contain an entry for each required > + entry in clock-names > +- clock-names : should include entries "ipg", "per" > + > +Example for i.MX6QDL: > + epit1: epit@20d0000 { > + compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; > + reg = <0x020d0000 0x4000>; > + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clks IMX6QDL_CLK_IPG_PER>, > + <&clks IMX6QDL_CLK_EPIT1>; > + clock-names = "ipg", "per"; > + }; > -- With best wishes, Vladimir
diff --git a/Documentation/devicetree/bindings/timer/fsl,imxepit.txt b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt new file mode 100644 index 000000000000..90112d58af10 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/fsl,imxepit.txt @@ -0,0 +1,24 @@ +Binding for the i.MX EPIT timer + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +Required properties: +- compatible: should be "fsl,imx31-epit" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: Should contain EPIT controller interrupt +- clocks: list of clock specifiers, must contain an entry for each required + entry in clock-names +- clock-names : should include entries "ipg", "per" + +Example for i.MX6QDL: + epit1: epit@20d0000 { + compatible = "fsl,imx6q-epit", "fsl,imx31-epit"; + reg = <0x020d0000 0x4000>; + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_IPG_PER>, + <&clks IMX6QDL_CLK_EPIT1>; + clock-names = "ipg", "per"; + };