| Message ID | 1526486004.8281.19.camel@us.ibm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [rs6000] Fixes for builtin_prefetch for AIX compatability. | expand |
Hi Carl, On Wed, May 16, 2018 at 08:53:24AM -0700, Carl Love wrote: > The previous patch to map dcbtstt, dcbtt to n2=0 for __builtin_prefetch > builtin caused issues on AIX. The issue is AIX does not support > the dcbtstt and dcbtt extended mnemonics. Unfortunately, the AIX > assembler also does not support the three operand form of dcbt and > dcbtst on Power 7. > > This patch fixes up the support for dcbtstt and dcbtt to make it > compatible with Linux and AIX. The new support now starts with Power 8 > rather then Power 7 on both systems for simplicity. Okay for trunk. Thank you! Segher > 2018-05-16 Carl Love <cel@us.ibm.com> > > * config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions > dcbt and dcbtstt with TH=16 if operands[2] is 0 and Power 8 or newer.
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 8536c89..19b4465 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -13233,22 +13233,27 @@ (match_operand:SI 2 "const_int_operand" "n"))] "" { - /* dcbtstt, dcbtt and TM=0b10000 support starts with ISA 2.06. */ - int inst_select = INTVAL (operands[2]) || !TARGET_POPCNTD; + + + /* dcbtstt, dcbtt and TH=0b10000 support starts with ISA 2.06 (Power7). + AIX does not support the dcbtstt and dcbtt extended mnemonics. + The AIX assembler does not support the three operand form of dcbt + and dcbtst on Power 7 (-mpwr7). */ + int inst_select = INTVAL (operands[2]) || !TARGET_DIRECT_MOVE; if (REG_P (operands[0])) { if (INTVAL (operands[1]) == 0) - return inst_select ? "dcbt 0,%0" : "dcbtt 0,%0"; + return inst_select ? "dcbt 0,%0" : "dcbt 0,%0,16"; else - return inst_select ? "dcbtst 0,%0" : "dcbtstt 0,%0"; + return inst_select ? "dcbtst 0,%0" : "dcbtst 0,%0,16"; } else { if (INTVAL (operands[1]) == 0) - return inst_select ? "dcbt %a0" : "dcbtt %a0"; + return inst_select ? "dcbt %a0" : "dcbt %a0,16"; else - return inst_select ? "dcbtst %a0" : "dcbtstt %a0"; + return inst_select ? "dcbtst %a0" : "dcbtst %a0,16"; } } [(set_attr "type" "load")])
GCC Maintainers: The previous patch to map dcbtstt, dcbtt to n2=0 for __builtin_prefetch builtin caused issues on AIX. The issue is AIX does not support the dcbtstt and dcbtt extended mnemonics. Unfortunately, the AIX assembler also does not support the three operand form of dcbt and dcbtst on Power 7. This patch fixes up the support for dcbtstt and dcbtt to make it compatible with Linux and AIX. The new support now starts with Power 8 rather then Power 7 on both systems for simplicity. The patch has been tested on powerpc64le-unknown-linux-gnu (Power 8 LE) AIX 7.2.0.0 Power 8 Please let me know if the fix is acceptable for trunk. Thanks. Carl Love ----------------------------------------------------------------------------- gcc/ChangeLog: 2018-05-16 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000.md (prefetch): Generate ISA 2.06 instructions dcbt and dcbtstt with TH=16 if operands[2] is 0 and Power 8 or newer. --- gcc/config/rs6000/rs6000.md | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)