[rs6000] Fix expected BE counts for vsx-vector-6.h

GCC Maintainers:

The following patch fixes issues found with the instruction counts for
the vsx-vector-6.h test.  It was found that on a BE system where GCC is
configured with --with-cpu=power6 the expected counts in vsx-vector-6-
be.c do not match.  This patch fixes the expected counts when
configuring and building GCC using --with-cpu=power6, --with-cpu=power7 
and --with-cpu=power8 on a BE system.

The patch was tested on 

    powerpc64le-unknown-linux-gnu (Power 8 LE)
    powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power6  
    powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power7
    powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power8

Please let me know if the patch looks OK for GCC mainline.

                         Carl Love
---------------------------------------------------------

gcc/testsuite/ChangeLog:

2018-05-10 Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/vsx-vector-6-be.c (dg-options): Update to run on
	Power 6 only.
	(dg-final): Update xvcmpgtdp, xvcmpgedp counts for Power 6.
	* gcc.target/powerpc/vsx-vector-6-be.p7.c (dg-final): New test file for
	Power 7.
	* gcc.target/powerpc/vsx-vector-6-be.p8.c (dg-final): New test file for
	Power 8.
---
 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c |  7 +++--
 .../gcc.target/powerpc/vsx-vector-6-be.p7.c        | 34 ++++++++++++++++++++++
 .../gcc.target/powerpc/vsx-vector-6-be.p8.c        | 34 ++++++++++++++++++++++
 3 files changed, 72 insertions(+), 3 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c

Hi,

On Thu, May 10, 2018 at 10:57:16AM -0700, Carl Love wrote:
> The following patch fixes issues found with the instruction counts for
> the vsx-vector-6.h test.  It was found that on a BE system where GCC is
> configured with --with-cpu=power6 the expected counts in vsx-vector-6-
> be.c do not match.  This patch fixes the expected counts when
> configuring and building GCC using --with-cpu=power6, --with-cpu=power7 
> and --with-cpu=power8 on a BE system.

> 2018-05-10 Carl Love  <cel@us.ibm.com>
> 	* gcc.target/powerpc/vsx-vector-6-be.c (dg-options): Update to run on
> 	Power 6 only.

Then please rename it to vsx-vector-6-be.p6.c like the others.  But, do
we want a test for p6 at all?  The test uses powerpc_vsx_ok which isn't
true on a p6 (so it runs on p7 and up, but with -mcpu=power6; do we want
to test that?)

> 	(dg-final): Update xvcmpgtdp, xvcmpgedp counts for Power 6.
> 	* gcc.target/powerpc/vsx-vector-6-be.p7.c (dg-final): New test file for
> 	Power 7.
> 	* gcc.target/powerpc/vsx-vector-6-be.p8.c (dg-final): New test file for
> 	Power 8.

Did you check that the updated counts make sense, i.e. that the expected
code is generated?

Okay for trunk if so (with the rename to .p6).  Thanks!


Segher

Segher:

I removed the Power 6 test file.  I also went back through the tests
and checked that each test had an instruction count check.  I found a
few that were missing the instruction check.  I added the instruction
checks and updated the expected instruction counts for the LE and BEcases.  The patch was retested on 

The patch was tested on 

    powerpc64le-unknown-linux-gnu (Power 8 LE)   
    powerpc64le-unknown-linux-gnu (Power 9 LE)
    powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power7
    powerpc64-unknown-linux-gnu (Power 8 BE)  configured for power8

Please let me know if the patch looks OK for GCC mainline.

                         Carl Love
---------------------------------------------------------
gcc/testsuite/ChangeLog:

2018-05-14 Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/vsx-vector-6-be.c: Remove file
	* gcc.target/powerpc/vsx-vector-6-be.p7.c (dg-final): New test file for
	Power 7.
	* gcc.target/powerpc/vsx-vector-6-be.p8.c (dg-final): New test file for
	Power 8.
	* gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update counts for
	.xvcmpeqdp., xvcmpgtdp., xvcmpgedp., xxlxor, xvrdpi.
---
 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c | 32 ----------------
 .../gcc.target/powerpc/vsx-vector-6-be.p7.c        | 43 ++++++++++++++++++++++
 .../gcc.target/powerpc/vsx-vector-6-be.p8.c        | 43 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c |  9 +++++
 4 files changed, 95 insertions(+), 32 deletions(-)
 delete mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c
 create mode 100644 gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c
deleted file mode 100644
index 3305781..0000000
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */
-/* { dg-skip-if "" { powerpc*-*-darwin* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-mvsx -O2" } */
-
-/* Expected instruction counts for Big Endian */
-
-/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 7 } } */
-/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */
-/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
-/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
-/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
-/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
-/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
-/* { dg-final { scan-assembler-times "vperm" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
-/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
-/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
-/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
-/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
-/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
-/* { dg-final { scan-assembler-times "xxland" 13 } } */
-/* { dg-final { scan-assembler-times "xxsel" 2 } } */
-
-/* Source code for the test in vsx-vector-6.h */
-#include "vsx-vector-6.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c
new file mode 100644
index 0000000..835b24f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p7.c
@@ -0,0 +1,43 @@
+/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -mcpu=power7" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+
+
+/* Expected instruction counts for Big Endian */
+
+/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 } } */
+/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */
+/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
+/* { dg-final { scan-assembler-times "vperm" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
+/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
+/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
+/* { dg-final { scan-assembler-times "xxland" 13 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 2 } } */
+/* { dg-final { scan-assembler-times "xxsel" 2 } } */
+/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
+/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */
+
+/* Source code for the test in vsx-vector-6.h */
+#include "vsx-vector-6.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c
new file mode 100644
index 0000000..3b81df8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-be.p8.c
@@ -0,0 +1,43 @@
+/* { dg-do compile { target { powerpc64-*-* && lp64 } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2 -mcpu=power8" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+
+/* Expected instruction counts for Big Endian */
+
+/* { dg-final { scan-assembler-times "xvabsdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvadddp" 1 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp" 6 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp." 6 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp" 8 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp." 8 } } */
+/* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */
+/* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmaxdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmindp" 1 } } */
+/* { dg-final { scan-assembler-times "xvmuldp" 1 } } */
+/* { dg-final { scan-assembler-times "vperm" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpic" 1 } } */
+/* { dg-final { scan-assembler-times "xvsqrtdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
+/* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
+/* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
+/* { dg-final { scan-assembler-times "xxland" 13 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 2 } } */
+/* { dg-final { scan-assembler-times "xxsel" 2 } } */
+/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
+/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */
+
+/* Source code for the test in vsx-vector-6.h */
+#include "vsx-vector-6.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
index dbf87b3..be5b972 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6-le.c
@@ -15,8 +15,11 @@
    xxlor instruction was generated.  */
 /* { dg-final { scan-assembler "xxlor" } } */
 /* { dg-final { scan-assembler-times "xvcmpeqdp" 4 } } */
+/* { dg-final { scan-assembler-times "xvcmpeqdp." 4 } } */
 /* { dg-final { scan-assembler-times "xvcmpgtdp" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpgtdp." 7 } } */
 /* { dg-final { scan-assembler-times "xvcmpgedp" 7 } } */
+/* { dg-final { scan-assembler-times "xvcmpgedp." 7 } } */
 /* { dg-final { scan-assembler-times "xvrdpim" 1 } } */
 /* { dg-final { scan-assembler-times "xvmaddadp" 1 } } */
 /* { dg-final { scan-assembler-times "xvmsubadp" 1 } } */
@@ -30,9 +33,15 @@
 /* { dg-final { scan-assembler-times "xvrdpiz" 1 } } */
 /* { dg-final { scan-assembler-times "xvmsubasp" 1 } } */
 /* { dg-final { scan-assembler-times "xvnmaddasp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmaddadp" 1 } } */
+/* { dg-final { scan-assembler-times "xvnmsubadp" 1 } } */
 /* { dg-final { scan-assembler-times "vmsumshs" 1 } } */
 /* { dg-final { scan-assembler-times "xxland" 13 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 2 } } */
 /* { dg-final { scan-assembler-times "xxsel" 2 } } */
+/* { dg-final { scan-assembler-times "xvrdpip" 1 } } */
+/* { dg-final { scan-assembler-times "xvdivdp" 1 } } */
+/* { dg-final { scan-assembler-times "xvrdpi" 5 } } */
 
 /* Source code for the test in vsx-vector-6.h */
 #include "vsx-vector-6.h"

Hi Carl,

On Tue, May 15, 2018 at 01:43:18PM -0700, Carl Love wrote:
> 	* gcc.target/powerpc/vsx-vector-6-be.c: Remove file

Full stop.

> 	* gcc.target/powerpc/vsx-vector-6-be.p7.c (dg-final): New test file for
> 	Power 7.

The whole file is new, so just
	* gcc.target/powerpc/vsx-vector-6-be.p7.c: New test file for Power 7.
or even
	* gcc.target/powerpc/vsx-vector-6-be.p7.c: New test.

> 	* gcc.target/powerpc/vsx-vector-6-le.c (dg-final): Update counts for
> 	.xvcmpeqdp., xvcmpgtdp., xvcmpgedp., xxlxor, xvrdpi.

Stray leading dot on this last line?

Okay for trunk, thanks!


Segher