| Message ID | 1525819783-13982-2-git-send-email-dgilhooley@nvidia.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [V2,1/2] arm64: Add MIDR encoding for Nvidia CPUs | expand |
In subject, s/Nvidia/NVIDIA/. On 09.05.2018 01:49, David Gilhooley wrote: > The Nvidia Denver CPU also needs a psci call to NVIDIA. And maybe also PSCI. > harden the branch predictor. Please use 72 columns for the commit message. Thanks, Mikko > > Signed-off-by: David Gilhooley <dgilhooley@nvidia.com> > --- > arch/arm64/kernel/cpu_errata.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c > index a900bef..e4a1182 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -316,6 +316,7 @@ static const struct midr_range arm64_bp_harden_smccc_cpus[] = { > MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), > MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR_V1), > MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR), > + MIDR_ALL_VERSIONS(MIDR_NVIDIA_DENVER), > {}, > }; > > -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index a900bef..e4a1182 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -316,6 +316,7 @@ static const struct midr_range arm64_bp_harden_smccc_cpus[] = { MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR_V1), MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR), + MIDR_ALL_VERSIONS(MIDR_NVIDIA_DENVER), {}, };
The Nvidia Denver CPU also needs a psci call to harden the branch predictor. Signed-off-by: David Gilhooley <dgilhooley@nvidia.com> --- arch/arm64/kernel/cpu_errata.c | 1 + 1 file changed, 1 insertion(+)