diff mbox series

[U-Boot,v2] mtd: nand: fsl_ifc: Fix nand waitfunc return value

Message ID 1521653565-30864-2-git-send-email-jagdish.gediya@nxp.com
State Superseded
Delegated to: York Sun
Headers show
Series [U-Boot,v2] mtd: nand: fsl_ifc: Fix nand waitfunc return value | expand

Commit Message

Jagdish Gediya March 21, 2018, 5:32 p.m. UTC
As per the IFC hardware manual, Most significant 2 bytes in
nand_fsr register are the outcome of NAND READ STATUS command.

So status value need to be shifted and aligned as per the nand
framework requirement.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---
Changes for v2:
	- Change the waitfunc return value according to semantic
	  enforced by framework.

 drivers/mtd/nand/fsl_ifc_nand.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

York Sun April 26, 2018, 9:01 p.m. UTC | #1
On 03/20/2018 10:24 PM, Jagdish Gediya wrote:
> As per the IFC hardware manual, Most significant 2 bytes in
> nand_fsr register are the outcome of NAND READ STATUS command.
> 
> So status value need to be shifted and aligned as per the nand
> framework requirement.
> 
> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> ---
> Changes for v2:
> 	- Change the waitfunc return value according to semantic
> 	  enforced by framework.
> 
>  drivers/mtd/nand/fsl_ifc_nand.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
> index 6eb44c3..7f487e7 100644
> --- a/drivers/mtd/nand/fsl_ifc_nand.c
> +++ b/drivers/mtd/nand/fsl_ifc_nand.c
> @@ -701,6 +701,7 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
>  	struct fsl_ifc_ctrl *ctrl = priv->ctrl;
>  	struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
>  	u32 nand_fsr;
> +	int status;
>  
>  	if (ctrl->status != IFC_NAND_EVTER_STAT_OPC)
>  		return NAND_STATUS_FAIL;
> @@ -721,10 +722,10 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
>  		return NAND_STATUS_FAIL;
>  
>  	nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
> +	status = nand_fsr >> 24;
>  

You said most significant 2 bytes are the outcome, and you shift 24
bits. Did you intentionally use one byte?

York
Prabhakar Kushwaha April 27, 2018, 2:58 a.m. UTC | #2
Hi York,

> -----Original Message-----
> From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of York Sun
> Sent: Friday, April 27, 2018 2:31 AM
> To: Jagdish Gediya <jagdish.gediya@nxp.com>; u-boot@lists.denx.de
> Cc: oss@buserror.net
> Subject: Re: [U-Boot] [PATCH][v2] mtd: nand: fsl_ifc: Fix nand waitfunc
> return value
> 
> On 03/20/2018 10:24 PM, Jagdish Gediya wrote:
> > As per the IFC hardware manual, Most significant 2 bytes in nand_fsr
> > register are the outcome of NAND READ STATUS command.
> >
> > So status value need to be shifted and aligned as per the nand
> > framework requirement.
> >
> > Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
> > Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> > ---
> > Changes for v2:
> > 	- Change the waitfunc return value according to semantic
> > 	  enforced by framework.
> >
> >  drivers/mtd/nand/fsl_ifc_nand.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/mtd/nand/fsl_ifc_nand.c
> > b/drivers/mtd/nand/fsl_ifc_nand.c index 6eb44c3..7f487e7 100644
> > --- a/drivers/mtd/nand/fsl_ifc_nand.c
> > +++ b/drivers/mtd/nand/fsl_ifc_nand.c
> > @@ -701,6 +701,7 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct
> nand_chip *chip)
> >  	struct fsl_ifc_ctrl *ctrl = priv->ctrl;
> >  	struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
> >  	u32 nand_fsr;
> > +	int status;
> >
> >  	if (ctrl->status != IFC_NAND_EVTER_STAT_OPC)
> >  		return NAND_STATUS_FAIL;
> > @@ -721,10 +722,10 @@ static int fsl_ifc_wait(struct mtd_info *mtd, struct
> nand_chip *chip)
> >  		return NAND_STATUS_FAIL;
> >
> >  	nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
> > +	status = nand_fsr >> 24;
> >
> 
> You said most significant 2 bytes are the outcome, and you shift 24 bits. Did
> you intentionally use one byte?
> 

Even though there are 2 bytes. 
But NAND sub-system only consume 1 byte because all NAND flash has 1 byte status register. 

--pk
York Sun April 27, 2018, 3:12 a.m. UTC | #3
> On Apr 26, 2018, at 19:58, Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> wrote:
>> 

<snip>

> 
> Even though there are 2 bytes. 
> But NAND sub-system only consume 1 byte because all NAND flash has 1 byte status register. 
> 

Then the commit message should describe the position of primary status field, instead of saying two bytes.

York
Jagdish Gediya May 1, 2018, 8:40 a.m. UTC | #4
Hi York,

> -----Original Message-----
> From: York Sun
> Sent: Friday, April 27, 2018 8:43 AM
> To: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> Cc: Jagdish Gediya <jagdish.gediya@nxp.com>; u-boot@lists.denx.de;
> oss@buserror.net
> Subject: Re: [U-Boot] [PATCH][v2] mtd: nand: fsl_ifc: Fix nand waitfunc return
> value
> 
> 
> > On Apr 26, 2018, at 19:58, Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com> wrote:
> >>
> 
> <snip>
> 
> >
> > Even though there are 2 bytes.
> > But NAND sub-system only consume 1 byte because all NAND flash has 1 byte
> status register.
> >
> 
> Then the commit message should describe the position of primary status field,
> instead of saying two bytes.
I will send the new revision of the patch.

Thanks,
Jagdish
diff mbox series

Patch

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 6eb44c3..7f487e7 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -701,6 +701,7 @@  static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 	struct fsl_ifc_ctrl *ctrl = priv->ctrl;
 	struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
 	u32 nand_fsr;
+	int status;
 
 	if (ctrl->status != IFC_NAND_EVTER_STAT_OPC)
 		return NAND_STATUS_FAIL;
@@ -721,10 +722,10 @@  static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 		return NAND_STATUS_FAIL;
 
 	nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
+	status = nand_fsr >> 24;
 
 	/* Chip sometimes reporting write protect even when it's not */
-	nand_fsr = nand_fsr | NAND_STATUS_WP;
-	return nand_fsr;
+	return status | NAND_STATUS_WP;
 }
 
 static int fsl_ifc_read_page(struct mtd_info *mtd, struct nand_chip *chip,