diff mbox series

[2/2] ACPI / LPSS: Add missing prv_offset setting for byt/cht PWM devices

Message ID 20180413125218.7131-3-hdegoede@redhat.com
State Superseded
Headers show
Series pwm/ACPI: Fix LPSS PWM suspend/resume issues | expand

Commit Message

Hans de Goede April 13, 2018, 12:52 p.m. UTC
The LPSS PWM device on on Bay Trail and Cherry Trail devices has a set
of private registers at offset 0x800, the current lpss_device_desc for
them already sets the LPSS_SAVE_CTX flag to have these saved/restored
over device-suspend, but the current lpss_device_desc was not setting
the prv_offset field, leading to the regular device registers getting
saved/restored instead.

This is causing the PWM controller to no longer work, resulting in a black
screen,  after a suspend/resume on systems where the firmware clears the
APB clock and reset bits at offset 0x804.

This commit fixes this by properly setting prv_offset to 0x800 for
the PWM devices.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/acpi/acpi_lpss.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Andy Shevchenko April 25, 2018, 4:51 p.m. UTC | #1
On Fri, 2018-04-13 at 14:52 +0200, Hans de Goede wrote:
> The LPSS PWM device on on Bay Trail and Cherry Trail devices has a set
> of private registers at offset 0x800, the current lpss_device_desc for
> them already sets the LPSS_SAVE_CTX flag to have these saved/restored
> over device-suspend, but the current lpss_device_desc was not setting
> the prv_offset field, leading to the regular device registers getting
> saved/restored instead.
> 
> This is causing the PWM controller to no longer work, resulting in a
> black
> screen,  after a suspend/resume on systems where the firmware clears
> the
> APB clock and reset bits at offset 0x804.
> 
> This commit fixes this by properly setting prv_offset to 0x800 for
> the PWM devices.
> 

Shouldn't be Fixes tag here?

> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
>  drivers/acpi/acpi_lpss.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
> index 2bcffec8dbf0..c4ba9164e582 100644
> --- a/drivers/acpi/acpi_lpss.c
> +++ b/drivers/acpi/acpi_lpss.c
> @@ -229,11 +229,13 @@ static const struct lpss_device_desc
> lpt_sdio_dev_desc = {
>  
>  static const struct lpss_device_desc byt_pwm_dev_desc = {
>  	.flags = LPSS_SAVE_CTX,
> +	.prv_offset = 0x800,
>  	.setup = byt_pwm_setup,
>  };
>  
>  static const struct lpss_device_desc bsw_pwm_dev_desc = {
>  	.flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
> +	.prv_offset = 0x800,
>  	.setup = bsw_pwm_setup,
>  };
>
Hans de Goede April 26, 2018, 12:09 p.m. UTC | #2
Hi,

On 25-04-18 18:51, Andy Shevchenko wrote:
> On Fri, 2018-04-13 at 14:52 +0200, Hans de Goede wrote:
>> The LPSS PWM device on on Bay Trail and Cherry Trail devices has a set
>> of private registers at offset 0x800, the current lpss_device_desc for
>> them already sets the LPSS_SAVE_CTX flag to have these saved/restored
>> over device-suspend, but the current lpss_device_desc was not setting
>> the prv_offset field, leading to the regular device registers getting
>> saved/restored instead.
>>
>> This is causing the PWM controller to no longer work, resulting in a
>> black
>> screen,  after a suspend/resume on systems where the firmware clears
>> the
>> APB clock and reset bits at offset 0x804.
>>
>> This commit fixes this by properly setting prv_offset to 0x800 for
>> the PWM devices.
>>
> 
> Shouldn't be Fixes tag here?

Good point, I'm sendout a v2 with the Fixes tag added now.

Regards,

Hans



> 
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> ---
>>   drivers/acpi/acpi_lpss.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
>> index 2bcffec8dbf0..c4ba9164e582 100644
>> --- a/drivers/acpi/acpi_lpss.c
>> +++ b/drivers/acpi/acpi_lpss.c
>> @@ -229,11 +229,13 @@ static const struct lpss_device_desc
>> lpt_sdio_dev_desc = {
>>   
>>   static const struct lpss_device_desc byt_pwm_dev_desc = {
>>   	.flags = LPSS_SAVE_CTX,
>> +	.prv_offset = 0x800,
>>   	.setup = byt_pwm_setup,
>>   };
>>   
>>   static const struct lpss_device_desc bsw_pwm_dev_desc = {
>>   	.flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
>> +	.prv_offset = 0x800,
>>   	.setup = bsw_pwm_setup,
>>   };
>>   
> 
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diff mbox series

Patch

diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 2bcffec8dbf0..c4ba9164e582 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -229,11 +229,13 @@  static const struct lpss_device_desc lpt_sdio_dev_desc = {
 
 static const struct lpss_device_desc byt_pwm_dev_desc = {
 	.flags = LPSS_SAVE_CTX,
+	.prv_offset = 0x800,
 	.setup = byt_pwm_setup,
 };
 
 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 	.flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
+	.prv_offset = 0x800,
 	.setup = bsw_pwm_setup,
 };