| Message ID | 1291973587-6718-1-git-send-email-hs@denx.de |
|---|---|
| State | Accepted |
| Delegated to: | Albert ARIBAUD |
| Headers | show |
> -----Original Message----- > From: Heiko Schocher [mailto:hs@denx.de] > Sent: Friday, December 10, 2010 3:03 PM > To: u-boot@lists.denx.de > Cc: Heiko Schocher; Albert ARIBAUD; Prafulla Wadaskar; Stefano Babic; > Reinhard Meyer > Subject: [PATCH] arm926ejs: timer: Replace bss variable by gdr > > Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss > values in the arm926ejs timers implementation. > > The usage of bss values in drivers before initialisation of bss is > forbidden. > In that special case some data in .rel.dyn gets corrupted. > > This patch is similiar to the patch Dirk Behme posted > for the armv7/omap-common/timer.c and added suggestions > from Reinhard Meyer. > > Tested on the arm926ejs mx27 based magnesium board > Tested on the arm926ejs kirkwood based suen3 board > > Signed-off-by: Heiko Schocher <hs@denx.de> > cc: Albert ARIBAUD <albert.aribaud@free.fr> > cc: Prafulla Wadaskar <prafulla@marvell.com> > cc: Stefano Babic <sbabic@denx.de> > cc: Reinhard Meyer <u-boot@emk-elektronik.de> > > Signed-off-by: Heiko Schocher <hs@denx.de> > --- > arch/arm/cpu/arm926ejs/davinci/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/kirkwood/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/mb86r0x/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/mx25/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/mx27/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/omap/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/orion5x/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/spear/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/versatile/timer.c | 6 ++++-- > 9 files changed, 36 insertions(+), 18 deletions(-) > Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Regards.. Prafulla . .
On 12/10/2010 10:33 AM, Heiko Schocher wrote: > Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss > values in the arm926ejs timers implementation. > > The usage of bss values in drivers before initialisation of bss is forbidden. > In that special case some data in .rel.dyn gets corrupted. > > This patch is similiar to the patch Dirk Behme posted > for the armv7/omap-common/timer.c and added suggestions > from Reinhard Meyer. > > Tested on the arm926ejs mx27 based magnesium board > Tested on the arm926ejs kirkwood based suen3 board > > Signed-off-by: Heiko Schocher <hs@denx.de> > cc: Albert ARIBAUD <albert.aribaud@free.fr> > cc: Prafulla Wadaskar <prafulla@marvell.com> > cc: Stefano Babic <sbabic@denx.de> > cc: Reinhard Meyer <u-boot@emk-elektronik.de> > > Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Best regards, Stefano Babic
Le 10/12/2010 10:33, Heiko Schocher a écrit : > Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss > values in the arm926ejs timers implementation. > > The usage of bss values in drivers before initialisation of bss is forbidden. > In that special case some data in .rel.dyn gets corrupted. > > This patch is similiar to the patch Dirk Behme posted > for the armv7/omap-common/timer.c and added suggestions > from Reinhard Meyer. > > Tested on the arm926ejs mx27 based magnesium board > Tested on the arm926ejs kirkwood based suen3 board > > Signed-off-by: Heiko Schocher<hs@denx.de> > cc: Albert ARIBAUD<albert.aribaud@free.fr> > cc: Prafulla Wadaskar<prafulla@marvell.com> > cc: Stefano Babic<sbabic@denx.de> > cc: Reinhard Meyer<u-boot@emk-elektronik.de> > > Signed-off-by: Heiko Schocher<hs@denx.de> > --- > arch/arm/cpu/arm926ejs/davinci/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/kirkwood/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/mb86r0x/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/mx25/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/mx27/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/omap/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/orion5x/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/spear/timer.c | 6 ++++-- > arch/arm/cpu/arm926ejs/versatile/timer.c | 6 ++++-- > 9 files changed, 36 insertions(+), 18 deletions(-) > > diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c > index 9da7443..d7b1e46 100644 > --- a/arch/arm/cpu/arm926ejs/davinci/timer.c > +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c > @@ -60,8 +60,10 @@ static struct davinci_timer * const timer = > #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) > #define TIM_CLK_DIV 16 > > -static ulong timestamp; > -static ulong lastinc; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastinc gd->lastinc > > int timer_init(void) > { > diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c b/arch/arm/cpu/arm926ejs/kirkwood/timer.c > index 2ec6a93..3e80329 100644 > --- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c > +++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c > @@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; > #define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) / \ > (CONFIG_SYS_TCLK / 1000)) > > -static ulong timestamp; > -static ulong lastdec; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastdec gd->lastinc > > void reset_timer_masked(void) > { > diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c > index 9175b71..6966b0d 100644 > --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c > +++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c > @@ -33,8 +33,10 @@ > #define TIMER_LOAD_VAL 0xffffffff > #define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256) > > -static unsigned long long timestamp; > -static ulong lastdec; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastdec gd->lastinc > > static inline unsigned long long tick_to_time(unsigned long long tick) > { > diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c > index 11d41a8..14f0c2d 100644 > --- a/arch/arm/cpu/arm926ejs/mx25/timer.c > +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c > @@ -41,8 +41,10 @@ > #include<asm/io.h> > #include<asm/arch/imx-regs.h> > > -static ulong timestamp; > -static ulong lastinc; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastinc gd->lastinc > > /* > * "time" is measured in 1 / CONFIG_SYS_HZ seconds, > diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c > index 8f1d47b..5c1cf01 100644 > --- a/arch/arm/cpu/arm926ejs/mx27/timer.c > +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c > @@ -43,8 +43,10 @@ > #define GPTCR_CLKSOURCE_32 (4<< 1) /* Clock source */ > #define GPTCR_TEN 1 /* Timer enable */ > > -static ulong timestamp; > -static ulong lastinc; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastinc gd->lastinc > > /* > * "time" is measured in 1 / CONFIG_SYS_HZ seconds, > diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c > index 7d4b6e6..88a0ee6 100644 > --- a/arch/arm/cpu/arm926ejs/omap/timer.c > +++ b/arch/arm/cpu/arm926ejs/omap/timer.c > @@ -42,8 +42,10 @@ > /* macro to read the 32 bit timer */ > #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8)) > > -static ulong timestamp; > -static ulong lastdec; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastdec gd->lastinc > > int timer_init (void) > { > diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c > index 089ef47..bbab226 100644 > --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c > +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c > @@ -90,8 +90,10 @@ static inline ulong read_timer(void) > / (CONFIG_SYS_TCLK / 1000); > } > > -static ulong timestamp; > -static ulong lastdec; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastdec gd->lastinc > > void reset_timer_masked(void) > { > diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c > index 06858b4..66cf4de 100644 > --- a/arch/arm/cpu/arm926ejs/spear/timer.c > +++ b/arch/arm/cpu/arm926ejs/spear/timer.c > @@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p = > static struct misc_regs *const misc_regs_p = > (struct misc_regs *)CONFIG_SPEAR_MISCBASE; > > -static ulong timestamp; > -static ulong lastdec; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastdec gd->lastinc > > int timer_init(void) > { > diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c > index 81d6749..2e243b1 100644 > --- a/arch/arm/cpu/arm926ejs/versatile/timer.c > +++ b/arch/arm/cpu/arm926ejs/versatile/timer.c > @@ -42,8 +42,10 @@ > /* macro to read the 32 bit timer */ > #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) > > -static ulong timestamp; > -static ulong lastdec; > +DECLARE_GLOBAL_DATA_PTR; > + > +#define timestamp gd->tbl > +#define lastdec gd->lastinc > > #define TIMER_ENABLE (1<< 7) > #define TIMER_MODE_MSK (1<< 6) Applied to u-boot-arm, with a trivial merge for davinci. Amicalement,
Le 20/01/2011 21:43, Albert ARIBAUD a écrit : > Le 10/12/2010 10:33, Heiko Schocher a écrit : >> Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss >> values in the arm926ejs timers implementation. >> >> The usage of bss values in drivers before initialisation of bss is forbidden. >> In that special case some data in .rel.dyn gets corrupted. >> >> This patch is similiar to the patch Dirk Behme posted >> for the armv7/omap-common/timer.c and added suggestions >> from Reinhard Meyer. >> >> Tested on the arm926ejs mx27 based magnesium board >> Tested on the arm926ejs kirkwood based suen3 board >> >> Signed-off-by: Heiko Schocher<hs@denx.de> >> cc: Albert ARIBAUD<albert.aribaud@free.fr> >> cc: Prafulla Wadaskar<prafulla@marvell.com> >> cc: Stefano Babic<sbabic@denx.de> >> cc: Reinhard Meyer<u-boot@emk-elektronik.de> >> >> Signed-off-by: Heiko Schocher<hs@denx.de> >> --- >> arch/arm/cpu/arm926ejs/davinci/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/kirkwood/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/mb86r0x/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/mx25/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/mx27/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/omap/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/orion5x/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/spear/timer.c | 6 ++++-- >> arch/arm/cpu/arm926ejs/versatile/timer.c | 6 ++++-- >> 9 files changed, 36 insertions(+), 18 deletions(-) >> >> diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c >> index 9da7443..d7b1e46 100644 >> --- a/arch/arm/cpu/arm926ejs/davinci/timer.c >> +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c >> @@ -60,8 +60,10 @@ static struct davinci_timer * const timer = >> #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) >> #define TIM_CLK_DIV 16 >> >> -static ulong timestamp; >> -static ulong lastinc; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastinc gd->lastinc >> >> int timer_init(void) >> { >> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c b/arch/arm/cpu/arm926ejs/kirkwood/timer.c >> index 2ec6a93..3e80329 100644 >> --- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c >> +++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c >> @@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; >> #define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) / \ >> (CONFIG_SYS_TCLK / 1000)) >> >> -static ulong timestamp; >> -static ulong lastdec; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastdec gd->lastinc >> >> void reset_timer_masked(void) >> { >> diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c >> index 9175b71..6966b0d 100644 >> --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c >> +++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c >> @@ -33,8 +33,10 @@ >> #define TIMER_LOAD_VAL 0xffffffff >> #define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256) >> >> -static unsigned long long timestamp; >> -static ulong lastdec; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastdec gd->lastinc >> >> static inline unsigned long long tick_to_time(unsigned long long tick) >> { >> diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c >> index 11d41a8..14f0c2d 100644 >> --- a/arch/arm/cpu/arm926ejs/mx25/timer.c >> +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c >> @@ -41,8 +41,10 @@ >> #include<asm/io.h> >> #include<asm/arch/imx-regs.h> >> >> -static ulong timestamp; >> -static ulong lastinc; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastinc gd->lastinc >> >> /* >> * "time" is measured in 1 / CONFIG_SYS_HZ seconds, >> diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c >> index 8f1d47b..5c1cf01 100644 >> --- a/arch/arm/cpu/arm926ejs/mx27/timer.c >> +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c >> @@ -43,8 +43,10 @@ >> #define GPTCR_CLKSOURCE_32 (4<< 1) /* Clock source */ >> #define GPTCR_TEN 1 /* Timer enable */ >> >> -static ulong timestamp; >> -static ulong lastinc; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastinc gd->lastinc >> >> /* >> * "time" is measured in 1 / CONFIG_SYS_HZ seconds, >> diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c >> index 7d4b6e6..88a0ee6 100644 >> --- a/arch/arm/cpu/arm926ejs/omap/timer.c >> +++ b/arch/arm/cpu/arm926ejs/omap/timer.c >> @@ -42,8 +42,10 @@ >> /* macro to read the 32 bit timer */ >> #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8)) >> >> -static ulong timestamp; >> -static ulong lastdec; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastdec gd->lastinc >> >> int timer_init (void) >> { >> diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c >> index 089ef47..bbab226 100644 >> --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c >> +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c >> @@ -90,8 +90,10 @@ static inline ulong read_timer(void) >> / (CONFIG_SYS_TCLK / 1000); >> } >> >> -static ulong timestamp; >> -static ulong lastdec; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastdec gd->lastinc >> >> void reset_timer_masked(void) >> { >> diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c >> index 06858b4..66cf4de 100644 >> --- a/arch/arm/cpu/arm926ejs/spear/timer.c >> +++ b/arch/arm/cpu/arm926ejs/spear/timer.c >> @@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p = >> static struct misc_regs *const misc_regs_p = >> (struct misc_regs *)CONFIG_SPEAR_MISCBASE; >> >> -static ulong timestamp; >> -static ulong lastdec; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastdec gd->lastinc >> >> int timer_init(void) >> { >> diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c >> index 81d6749..2e243b1 100644 >> --- a/arch/arm/cpu/arm926ejs/versatile/timer.c >> +++ b/arch/arm/cpu/arm926ejs/versatile/timer.c >> @@ -42,8 +42,10 @@ >> /* macro to read the 32 bit timer */ >> #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) >> >> -static ulong timestamp; >> -static ulong lastdec; >> +DECLARE_GLOBAL_DATA_PTR; >> + >> +#define timestamp gd->tbl >> +#define lastdec gd->lastinc >> >> #define TIMER_ENABLE (1<< 7) >> #define TIMER_MODE_MSK (1<< 6) > > Applied to u-boot-arm, with a trivial merge for davinci. Correction -- can't apply it *and* retain correct authorship in commit. Heiko, can you post a rebased version? Amicalement,
Hello Albert, Albert ARIBAUD wrote: > Le 20/01/2011 21:43, Albert ARIBAUD a écrit : >> Le 10/12/2010 10:33, Heiko Schocher a écrit : >>> Reuse the gd->tbl value for timestamp and add gd->lastinc for lastinc bss >>> values in the arm926ejs timers implementation. >>> >>> The usage of bss values in drivers before initialisation of bss is forbidden. >>> In that special case some data in .rel.dyn gets corrupted. >>> >>> This patch is similiar to the patch Dirk Behme posted >>> for the armv7/omap-common/timer.c and added suggestions >>> from Reinhard Meyer. >>> >>> Tested on the arm926ejs mx27 based magnesium board >>> Tested on the arm926ejs kirkwood based suen3 board >>> >>> Signed-off-by: Heiko Schocher<hs@denx.de> >>> cc: Albert ARIBAUD<albert.aribaud@free.fr> >>> cc: Prafulla Wadaskar<prafulla@marvell.com> >>> cc: Stefano Babic<sbabic@denx.de> >>> cc: Reinhard Meyer<u-boot@emk-elektronik.de> >>> >>> Signed-off-by: Heiko Schocher<hs@denx.de> >>> --- >>> arch/arm/cpu/arm926ejs/davinci/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/kirkwood/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/mb86r0x/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/mx25/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/mx27/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/omap/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/orion5x/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/spear/timer.c | 6 ++++-- >>> arch/arm/cpu/arm926ejs/versatile/timer.c | 6 ++++-- >>> 9 files changed, 36 insertions(+), 18 deletions(-) [...] >>> #define TIMER_ENABLE (1<< 7) >>> #define TIMER_MODE_MSK (1<< 6) >> Applied to u-boot-arm, with a trivial merge for davinci. > > Correction -- can't apply it *and* retain correct authorship in commit. > Heiko, can you post a rebased version? Ok, I rebase this patch against current mainline, and send a new version. bye, Heiko
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c index 9da7443..d7b1e46 100644 --- a/arch/arm/cpu/arm926ejs/davinci/timer.c +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c @@ -60,8 +60,10 @@ static struct davinci_timer * const timer = #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ) #define TIM_CLK_DIV 16 -static ulong timestamp; -static ulong lastinc; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastinc gd->lastinc int timer_init(void) { diff --git a/arch/arm/cpu/arm926ejs/kirkwood/timer.c b/arch/arm/cpu/arm926ejs/kirkwood/timer.c index 2ec6a93..3e80329 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/timer.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/timer.c @@ -83,8 +83,10 @@ struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers *)KW_TIMER_BASE; #define READ_TIMER (readl(CNTMR_VAL_REG(UBOOT_CNTR)) / \ (CONFIG_SYS_TCLK / 1000)) -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastdec gd->lastinc void reset_timer_masked(void) { diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c index 9175b71..6966b0d 100644 --- a/arch/arm/cpu/arm926ejs/mb86r0x/timer.c +++ b/arch/arm/cpu/arm926ejs/mb86r0x/timer.c @@ -33,8 +33,10 @@ #define TIMER_LOAD_VAL 0xffffffff #define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256) -static unsigned long long timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastdec gd->lastinc static inline unsigned long long tick_to_time(unsigned long long tick) { diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c index 11d41a8..14f0c2d 100644 --- a/arch/arm/cpu/arm926ejs/mx25/timer.c +++ b/arch/arm/cpu/arm926ejs/mx25/timer.c @@ -41,8 +41,10 @@ #include <asm/io.h> #include <asm/arch/imx-regs.h> -static ulong timestamp; -static ulong lastinc; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastinc gd->lastinc /* * "time" is measured in 1 / CONFIG_SYS_HZ seconds, diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c index 8f1d47b..5c1cf01 100644 --- a/arch/arm/cpu/arm926ejs/mx27/timer.c +++ b/arch/arm/cpu/arm926ejs/mx27/timer.c @@ -43,8 +43,10 @@ #define GPTCR_CLKSOURCE_32 (4 << 1) /* Clock source */ #define GPTCR_TEN 1 /* Timer enable */ -static ulong timestamp; -static ulong lastinc; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastinc gd->lastinc /* * "time" is measured in 1 / CONFIG_SYS_HZ seconds, diff --git a/arch/arm/cpu/arm926ejs/omap/timer.c b/arch/arm/cpu/arm926ejs/omap/timer.c index 7d4b6e6..88a0ee6 100644 --- a/arch/arm/cpu/arm926ejs/omap/timer.c +++ b/arch/arm/cpu/arm926ejs/omap/timer.c @@ -42,8 +42,10 @@ /* macro to read the 32 bit timer */ #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+8)) -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastdec gd->lastinc int timer_init (void) { diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c index 089ef47..bbab226 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c @@ -90,8 +90,10 @@ static inline ulong read_timer(void) / (CONFIG_SYS_TCLK / 1000); } -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastdec gd->lastinc void reset_timer_masked(void) { diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c index 06858b4..66cf4de 100644 --- a/arch/arm/cpu/arm926ejs/spear/timer.c +++ b/arch/arm/cpu/arm926ejs/spear/timer.c @@ -36,8 +36,10 @@ static struct gpt_regs *const gpt_regs_p = static struct misc_regs *const misc_regs_p = (struct misc_regs *)CONFIG_SPEAR_MISCBASE; -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastdec gd->lastinc int timer_init(void) { diff --git a/arch/arm/cpu/arm926ejs/versatile/timer.c b/arch/arm/cpu/arm926ejs/versatile/timer.c index 81d6749..2e243b1 100644 --- a/arch/arm/cpu/arm926ejs/versatile/timer.c +++ b/arch/arm/cpu/arm926ejs/versatile/timer.c @@ -42,8 +42,10 @@ /* macro to read the 32 bit timer */ #define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; + +#define timestamp gd->tbl +#define lastdec gd->lastinc #define TIMER_ENABLE (1 << 7) #define TIMER_MODE_MSK (1 << 6)