| Message ID | 20180205040008.28362-1-ruscur@russell.cc |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/2] phb4: Fix TCE page size | expand |
Russell Currey <ruscur@russell.cc> writes: > The page sizes for TCEs on P9 were inaccurate and just copied from PHB3, > so correct them. Series merged to master as of 08b1929052f8dfa1cc6b0ab3a9df77c9b5493914 and made it ot rc4 We really do need some device tree bindings docs on all the pci stuff though.
On Wed, 2018-02-21 at 14:27 +1100, Stewart Smith wrote: > Russell Currey <ruscur@russell.cc> writes: > > The page sizes for TCEs on P9 were inaccurate and just copied from > > PHB3, > > so correct them. > > Series merged to master as of > 08b1929052f8dfa1cc6b0ab3a9df77c9b5493914 > and made it ot rc4 > > We really do need some device tree bindings docs on all the pci stuff > though. Definitely, none of the PHB-related DT bindings are documented and I noticed some of the OPAL call documentation is inaccurate too. Hope to look at it soon
Russell Currey <ruscur@russell.cc> writes: > On Wed, 2018-02-21 at 14:27 +1100, Stewart Smith wrote: >> Russell Currey <ruscur@russell.cc> writes: >> > The page sizes for TCEs on P9 were inaccurate and just copied from >> > PHB3, >> > so correct them. >> >> Series merged to master as of >> 08b1929052f8dfa1cc6b0ab3a9df77c9b5493914 >> and made it ot rc4 >> >> We really do need some device tree bindings docs on all the pci stuff >> though. > > Definitely, none of the PHB-related DT bindings are documented and I > noticed some of the OPAL call documentation is inaccurate too. Hope to > look at it soon The OPAL call documentation is literally copy and pasted from an internal Wiki for pre-skiboot OPAL (i.e. OPALv2 or OPALv1) - only so I could delete the internal wiki pages. I was hoping that the out of date and wrong (and clearly marked as such) docs would be sooooo offensive to someone they'd write something better :)
diff --git a/hw/phb4.c b/hw/phb4.c index 93ed1e06..0a7e3065 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -1504,11 +1504,11 @@ static int64_t phb4_map_pe_dma_window(struct phb *phb, case 0x10000: /* 64K */ data64 = SETFIELD(IODA3_TVT_IO_PSIZE, data64, 5); break; - case 0x1000000: /* 16M */ - data64 = SETFIELD(IODA3_TVT_IO_PSIZE, data64, 13); + case 0x200000: /* 2M */ + data64 = SETFIELD(IODA3_TVT_IO_PSIZE, data64, 10); break; - case 0x10000000: /* 256M */ - data64 = SETFIELD(IODA3_TVT_IO_PSIZE, data64, 17); + case 0x40000000: /* 1G */ + data64 = SETFIELD(IODA3_TVT_IO_PSIZE, data64, 19); break; default: return OPAL_PARAMETER;
The page sizes for TCEs on P9 were inaccurate and just copied from PHB3, so correct them. Signed-off-by: Russell Currey <ruscur@russell.cc> --- hw/phb4.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)