| Message ID | 20171127201333.189812-1-venture@google.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [linux] ARM: dts: aspeed: quanta: add i2cmux for frus | expand |
On Tue, Nov 28, 2017 at 6:43 AM, Patrick Venture <venture@google.com> wrote: > The memory riser frus on the board are controlled > by a gpio mux. > > Signed-off-by: Patrick Venture <venture@google.com> > --- > arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 93 +++++++++++++++++++++------- > 1 file changed, 69 insertions(+), 24 deletions(-) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts > index 42b1d8007316..b93b29191960 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts > @@ -119,6 +119,75 @@ > <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, > <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>; > }; > + > + i2cmux@1 { When you stick a unit name on a node, it is supposed to have a matching reg property. We don't have a reg property here, so we shouldn't have the number. This matches what the i2c-mux-gpio bindings describe. I dropped the '@1' for you when applying. It's in dev-4.10 now. Cheers, Joel > + compatible = "i2c-mux-gpio"; > + #address-cells = <1>; > + #size-cells = <0>;
Thanks. I added the @1 from reading another device-tree that used this not super commonly used node. But your explanation makes perfect sense. Patrick On Thu, Dec 7, 2017 at 10:32 PM, Joel Stanley <joel@jms.id.au> wrote: > On Tue, Nov 28, 2017 at 6:43 AM, Patrick Venture <venture@google.com> wrote: >> The memory riser frus on the board are controlled >> by a gpio mux. >> >> Signed-off-by: Patrick Venture <venture@google.com> >> --- >> arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 93 +++++++++++++++++++++------- >> 1 file changed, 69 insertions(+), 24 deletions(-) >> >> diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts >> index 42b1d8007316..b93b29191960 100644 >> --- a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts >> +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts >> @@ -119,6 +119,75 @@ >> <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, >> <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>; >> }; >> + >> + i2cmux@1 { > > When you stick a unit name on a node, it is supposed to have a > matching reg property. We don't have a reg property here, so we > shouldn't have the number. This matches what the i2c-mux-gpio bindings > describe. > > I dropped the '@1' for you when applying. It's in dev-4.10 now. > > Cheers, > > Joel > >> + compatible = "i2c-mux-gpio"; >> + #address-cells = <1>; >> + #size-cells = <0>;
diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts index 42b1d8007316..b93b29191960 100644 --- a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts @@ -119,6 +119,75 @@ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>; }; + + i2cmux@1 { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + mux-gpios = <&sgpio 10 GPIO_ACTIVE_HIGH>; + i2c-parent = <&i2c1>; + + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + /* Memory Riser 1 FRU */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* Memory Riser 2 FRU */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* Memory Riser 3 FRU */ + eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Memory Riser 4 FRU */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* Memory Riser 5 FRU */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* Memory Riser 6 FRU */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* Memory Riser 7 FRU */ + eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Memory Riser 8 FRU */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + }; + }; + }; }; &fmc { @@ -196,30 +265,6 @@ reg = <0x4f>; }; - /* Memory Riser 1/5 FRU */ - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - }; - - /* Memory Riser 2/6 FRU */ - eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - }; - - /* Memory Riser 3/7 FRU */ - eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - }; - - /* Memory Riser 4/8 FRU */ - eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - }; - /* Baseboard FRU */ eeprom@54 { compatible = "atmel,24c64";
The memory riser frus on the board are controlled by a gpio mux. Signed-off-by: Patrick Venture <venture@google.com> --- arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 93 +++++++++++++++++++++------- 1 file changed, 69 insertions(+), 24 deletions(-)