| Message ID | 1510680522-8292-1-git-send-email-arbab@linux.vnet.ibm.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | Revert "npu2: hw-procedures: Enable low power mode" | expand |
Acked-by: Alistair Popple <alistair@popple.id.au> > As it turns out, low power mode is not yet ready for prime time. We > shouldn't write the low power config register until it is. > > This reverts commit a05054c53a37850a2118d01fcf6669ebb10d1a33. > > Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> > --- > Sorry for the churn on this. We had gotten conflicting direction on > exactly what the hardware is capable of at this time. > > hw/npu2-hw-procedures.c | 19 +------------------ > include/npu2-regs.h | 6 ------ > 2 files changed, 1 insertion(+), 24 deletions(-) > > diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c > index 85c2427..7a5d188 100644 > --- a/hw/npu2-hw-procedures.c > +++ b/hw/npu2-hw-procedures.c > @@ -320,26 +320,9 @@ static uint32_t phy_reset_complete(struct npu2_dev > *ndev) > phy_write_lane(ndev, &NPU2_PHY_RX_E_INTEG_COARSE_GAIN, lane, 11); > } > > - return PROCEDURE_NEXT; > -} > - > -/* Procedure 1.2.11 - Enable Low Power Mode */ > -static uint32_t enable_low_power(struct npu2_dev *ndev) > -{ > - uint64_t val; > - > - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_MODE_ENABLE, 0ull, 1); > - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_ONLY_MODE, val, 1); > - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_TIMER_TICK_CONFIG, val, 22); > - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_MIN_CRED_THRESH, val, 68); > - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_MAX_CRED_THRESH, val, 68); > - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_CNT_THRESH, val, 477); > - npu2_write(ndev->npu, NPU2_NTL_LOW_POWER_CFG(ndev), val); > - > return PROCEDURE_COMPLETE; > } > -DEFINE_PROCEDURE(phy_reset, phy_reset_wait, phy_reset_complete, > - enable_low_power); > +DEFINE_PROCEDURE(phy_reset, phy_reset_wait, phy_reset_complete); > > /* Procedure 1.2.6 - I/O PHY Tx Impedance Calibration */ > static uint32_t phy_tx_zcal(struct npu2_dev *ndev) > diff --git a/include/npu2-regs.h b/include/npu2-regs.h > index 307e93b..759404c 100644 > --- a/include/npu2-regs.h > +++ b/include/npu2-regs.h > @@ -248,12 +248,6 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, > uint64_t val, uint64_t mask); > #define NPU2_NTL_MISC_CFG1(ndev) NPU2_NTLU_REG_OFFSET(ndev, 0x0C0) > #define NPU2_NTL_SCRATCH1(ndev) NPU2_NTLU_REG_OFFSET(ndev, 0x0D0) > #define NPU2_NTL_LOW_POWER_CFG(ndev) NPU2_NTLU_REG_OFFSET(ndev, 0x0E0) > -#define NPU2_NTL_LOW_POWER_CFG_MODE_ENABLE PPC_BIT(0) > -#define NPU2_NTL_LOW_POWER_CFG_ONLY_MODE PPC_BIT(1) > -#define NPU2_NTL_LOW_POWER_CFG_TIMER_TICK_CONFIG PPC_BITMASK(2,7) > -#define NPU2_NTL_LOW_POWER_CFG_MIN_CRED_THRESH PPC_BITMASK(8,19) > -#define NPU2_NTL_LOW_POWER_CFG_MAX_CRED_THRESH PPC_BITMASK(20,31) > -#define NPU2_NTL_LOW_POWER_CFG_CNT_THRESH PPC_BITMASK(32,43) > #define NPU2_NTL_DBG_INHIBIT_CFG(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x220) > #define NPU2_NTL_DISPLAY_CTL(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x280) > #define NPU2_NTL_DISPLAY_DATA0(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x288) > -- > 1.8.3.1 > >
Reza Arbab <arbab@linux.vnet.ibm.com> writes: > As it turns out, low power mode is not yet ready for prime time. We > shouldn't write the low power config register until it is. > > This reverts commit a05054c53a37850a2118d01fcf6669ebb10d1a33. > > Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> > --- > Sorry for the churn on this. We had gotten conflicting direction on > exactly what the hardware is capable of at this time. Yeah, that happens. It was only in master for a bit, so shouldn't really affect bisecting any problems down at least. Merged to master as of 9b068ad820a870c203571548c9025455f0f3e8b8
diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index 85c2427..7a5d188 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -320,26 +320,9 @@ static uint32_t phy_reset_complete(struct npu2_dev *ndev) phy_write_lane(ndev, &NPU2_PHY_RX_E_INTEG_COARSE_GAIN, lane, 11); } - return PROCEDURE_NEXT; -} - -/* Procedure 1.2.11 - Enable Low Power Mode */ -static uint32_t enable_low_power(struct npu2_dev *ndev) -{ - uint64_t val; - - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_MODE_ENABLE, 0ull, 1); - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_ONLY_MODE, val, 1); - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_TIMER_TICK_CONFIG, val, 22); - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_MIN_CRED_THRESH, val, 68); - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_MAX_CRED_THRESH, val, 68); - val = SETFIELD(NPU2_NTL_LOW_POWER_CFG_CNT_THRESH, val, 477); - npu2_write(ndev->npu, NPU2_NTL_LOW_POWER_CFG(ndev), val); - return PROCEDURE_COMPLETE; } -DEFINE_PROCEDURE(phy_reset, phy_reset_wait, phy_reset_complete, - enable_low_power); +DEFINE_PROCEDURE(phy_reset, phy_reset_wait, phy_reset_complete); /* Procedure 1.2.6 - I/O PHY Tx Impedance Calibration */ static uint32_t phy_tx_zcal(struct npu2_dev *ndev) diff --git a/include/npu2-regs.h b/include/npu2-regs.h index 307e93b..759404c 100644 --- a/include/npu2-regs.h +++ b/include/npu2-regs.h @@ -248,12 +248,6 @@ void npu2_write_mask(struct npu2 *p, uint64_t reg, uint64_t val, uint64_t mask); #define NPU2_NTL_MISC_CFG1(ndev) NPU2_NTLU_REG_OFFSET(ndev, 0x0C0) #define NPU2_NTL_SCRATCH1(ndev) NPU2_NTLU_REG_OFFSET(ndev, 0x0D0) #define NPU2_NTL_LOW_POWER_CFG(ndev) NPU2_NTLU_REG_OFFSET(ndev, 0x0E0) -#define NPU2_NTL_LOW_POWER_CFG_MODE_ENABLE PPC_BIT(0) -#define NPU2_NTL_LOW_POWER_CFG_ONLY_MODE PPC_BIT(1) -#define NPU2_NTL_LOW_POWER_CFG_TIMER_TICK_CONFIG PPC_BITMASK(2,7) -#define NPU2_NTL_LOW_POWER_CFG_MIN_CRED_THRESH PPC_BITMASK(8,19) -#define NPU2_NTL_LOW_POWER_CFG_MAX_CRED_THRESH PPC_BITMASK(20,31) -#define NPU2_NTL_LOW_POWER_CFG_CNT_THRESH PPC_BITMASK(32,43) #define NPU2_NTL_DBG_INHIBIT_CFG(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x220) #define NPU2_NTL_DISPLAY_CTL(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x280) #define NPU2_NTL_DISPLAY_DATA0(ndev) NPU2_NTL_REG_OFFSET(ndev, 0x288)
As it turns out, low power mode is not yet ready for prime time. We shouldn't write the low power config register until it is. This reverts commit a05054c53a37850a2118d01fcf6669ebb10d1a33. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> --- Sorry for the churn on this. We had gotten conflicting direction on exactly what the hardware is capable of at this time. hw/npu2-hw-procedures.c | 19 +------------------ include/npu2-regs.h | 6 ------ 2 files changed, 1 insertion(+), 24 deletions(-)