| Message ID | 4D0AF1C4.9000706@codesourcery.com |
|---|---|
| State | New |
| Headers | show |
OK. R. On Fri, 2010-12-17 at 13:14 +0800, Chung-Lin Tang wrote: > Hi Richard, > this is a VFP load/store index range patch that I submitted last > year[1], which you approved at that time, but never got committed. > > I've added the Thumb-2 bits I missed then, corrected some stuff in the > testcase, and re-submitting now. Re-tested without regressions. Is this > ok for trunk? > > Thanks, > Chung-Lin > > [1] http://gcc.gnu.org/ml/gcc-patches/2009-07/msg01844.html > > > 2010-12-17 Chung-Lin Tang <cltang@codesourcery.com> > > gcc/ > * config/arm/arm.c > (arm_legitimate_index_p): Add VFP load/store index range case. > Change to SF/DFmode tests to avoid capturing HFmode. > (thumb2_legitimate_index_p): Same. > > gcc/testsuite/ > * gcc.target/arm/vfp-1.c (test_ldst): New test for VFP > load/store immediate indexes.
On Fri, Dec 17, 2010 at 5:14 AM, Chung-Lin Tang <cltang@codesourcery.com> wrote: > Hi Richard, > this is a VFP load/store index range patch that I submitted last > year[1], which you approved at that time, but never got committed. > > I've added the Thumb-2 bits I missed then, corrected some stuff in the > testcase, and re-submitting now. Re-tested without regressions. Is this > ok for trunk? This caused http://gcc.gnu.org/PR47246 cheers Ramana > > Thanks, > Chung-Lin > > [1] http://gcc.gnu.org/ml/gcc-patches/2009-07/msg01844.html > > > 2010-12-17 Chung-Lin Tang <cltang@codesourcery.com> > > gcc/ > * config/arm/arm.c > (arm_legitimate_index_p): Add VFP load/store index range case. > Change to SF/DFmode tests to avoid capturing HFmode. > (thumb2_legitimate_index_p): Same. > > gcc/testsuite/ > * gcc.target/arm/vfp-1.c (test_ldst): New test for VFP > load/store immediate indexes. >
Index: config/arm/arm.c =================================================================== --- config/arm/arm.c (revision 167900) +++ config/arm/arm.c (working copy) @@ -5647,8 +5647,8 @@ /* Standard coprocessor addressing modes. */ if (TARGET_HARD_FLOAT - && (TARGET_FPA || TARGET_MAVERICK) - && (GET_MODE_CLASS (mode) == MODE_FLOAT + && (TARGET_VFP || TARGET_FPA || TARGET_MAVERICK) + && (mode == SFmode || mode == DFmode || (TARGET_MAVERICK && mode == DImode))) return (code == CONST_INT && INTVAL (index) < 1024 && INTVAL (index) > -1024 @@ -5768,8 +5768,8 @@ /* ??? Combine arm and thumb2 coprocessor addressing modes. */ /* Standard coprocessor addressing modes. */ if (TARGET_HARD_FLOAT - && (TARGET_FPA || TARGET_MAVERICK) - && (GET_MODE_CLASS (mode) == MODE_FLOAT + && (TARGET_VFP || TARGET_FPA || TARGET_MAVERICK) + && (mode == SFmode || mode == DFmode || (TARGET_MAVERICK && mode == DImode))) return (code == CONST_INT && INTVAL (index) < 1024 && INTVAL (index) > -1024 Index: testsuite/gcc.target/arm/vfp-1.c =================================================================== --- testsuite/gcc.target/arm/vfp-1.c (revision 167900) +++ testsuite/gcc.target/arm/vfp-1.c (working copy) @@ -125,3 +125,15 @@ d1 = u1; } +void test_ldst (float f[], double d[]) { + /* { dg-final { scan-assembler "flds.+ \\\[r0, #1020\\\]" } } */ + /* { dg-final { scan-assembler "flds.+ \\\[r0, #-1020\\\]" } } */ + /* { dg-final { scan-assembler "add.+ r0, #1024" } } */ + /* { dg-final { scan-assembler "fsts.+ \\\[r0, #0\\\]$" } } */ + f[256] = f[255] + f[-255]; + + /* { dg-final { scan-assembler "fldd.+ \\\[r1, #1016\\\]" } } */ + /* { dg-final { scan-assembler "fldd.+ \\\[r1, #-1016\\\]" } } */ + /* { dg-final { scan-assembler "fstd.+ \\\[r1, #256\\\]" } } */ + d[32] = d[127] + d[-127]; +}