[1/4] dt-bindings: clock: tegra: Add sor1_out clock

From: Thierry Reding <treding@nvidia.com>

The sor1_src clock implemented on Tegra210 is modelled the wrong way
around, which causes some issues with HDMI and DP support. This clock
implementation is provided by BPMP on Tegra186, which models this in
a more correct way. Since this introduces incompatibilities between
the two SoC generations which we want to avoid, the Tegra210 will be
fixed in subsequent patches.

This change adds sor1_out as an alias for sor1_src.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 include/dt-bindings/clock/tegra210-car.h | 1 +
 1 file changed, 1 insertion(+)

On 09/01, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The sor1_src clock implemented on Tegra210 is modelled the wrong way
> around, which causes some issues with HDMI and DP support. This clock
> implementation is provided by BPMP on Tegra186, which models this in
> a more correct way. Since this introduces incompatibilities between
> the two SoC generations which we want to avoid, the Tegra210 will be
> fixed in subsequent patches.
> 
> This change adds sor1_out as an alias for sor1_src.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---

Applied to clk-next

On Thu, Nov 02, 2017 at 01:16:48AM -0700, Stephen Boyd wrote:
> On 09/01, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > The sor1_src clock implemented on Tegra210 is modelled the wrong way
> > around, which causes some issues with HDMI and DP support. This clock
> > implementation is provided by BPMP on Tegra186, which models this in
> > a more correct way. Since this introduces incompatibilities between
> > the two SoC generations which we want to avoid, the Tegra210 will be
> > fixed in subsequent patches.
> > 
> > This change adds sor1_out as an alias for sor1_src.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> 
> Applied to clk-next

Hi Stephen,

sorry for not having been clear about this. This patch and the  2-4 are
part of the pull request I sent out earlier (and for which I have an
updated one to fix the regression I mentioned last week). I'd prefer to
send this to you via pull request because there is a dependency on this
from the ARM SoC tree (for a DT change).

Any chance you could back this out?

Thierry

On 11/02, Thierry Reding wrote:
> On Thu, Nov 02, 2017 at 01:16:48AM -0700, Stephen Boyd wrote:
> > On 09/01, Thierry Reding wrote:
> > > From: Thierry Reding <treding@nvidia.com>
> > > 
> > > The sor1_src clock implemented on Tegra210 is modelled the wrong way
> > > around, which causes some issues with HDMI and DP support. This clock
> > > implementation is provided by BPMP on Tegra186, which models this in
> > > a more correct way. Since this introduces incompatibilities between
> > > the two SoC generations which we want to avoid, the Tegra210 will be
> > > fixed in subsequent patches.
> > > 
> > > This change adds sor1_out as an alias for sor1_src.
> > > 
> > > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > > ---
> > 
> > Applied to clk-next
> 
> Hi Stephen,
> 
> sorry for not having been clear about this. This patch and the  2-4 are
> part of the pull request I sent out earlier (and for which I have an
> updated one to fix the regression I mentioned last week). I'd prefer to
> send this to you via pull request because there is a dependency on this
> from the ARM SoC tree (for a DT change).
> 

Sure I can back out the changes. Next time please indicate your
merge path/strategy in some sort of cover letter so I can ignore
changes in the review queue. Also, if you pick up a patch from
the list please send a note that you applied it to your tree so I
know to wait for a PR later.

Is the PR coming soon? I forgot about it because we were waiting
for the second one.