| Message ID | 20170905084306.19318-5-mperttunen@nvidia.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | Host1x and VIC support for Tegra186 | expand |
On Tue, Sep 05, 2017 at 11:43:04AM +0300, Mikko Perttunen wrote: > Add the Tegra186-specific hypervisor-related register range > properties. > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > --- > v2: > - Dropped incorrect note about cells properties. > > .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 ++++ > 1 file changed, 4 insertions(+) Acked-by: Rob Herring <robh@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, Sep 05, 2017 at 11:43:04AM +0300, Mikko Perttunen wrote: > Add the Tegra186-specific hypervisor-related register range > properties. > > Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> > --- > v2: > - Dropped incorrect note about cells properties. > > .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 ++++ > 1 file changed, 4 insertions(+) Applied, thanks. Thierry
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index 74e1e8add5a1..844e0103fb0d 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -3,6 +3,10 @@ NVIDIA Tegra host1x Required properties: - compatible: "nvidia,tegra<chip>-host1x" - reg: Physical base address and length of the controller's registers. + For pre-Tegra186, one entry describing the whole register area. + For Tegra186, one entry for each entry in reg-names: + "vm" - VM region assigned to Linux + "hypervisor" - Hypervisor region (only if Linux acts as hypervisor) - interrupts: The interrupt outputs from the controller. - #address-cells: The number of cells used to represent physical base addresses in the host1x address space. Should be 1.
Add the Tegra186-specific hypervisor-related register range properties. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> --- v2: - Dropped incorrect note about cells properties. .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 ++++ 1 file changed, 4 insertions(+)