diff mbox series

[v2,3/6] arm64: tegra: Add VIC on Tegra186

Message ID 20170905084306.19318-4-mperttunen@nvidia.com
State Accepted
Headers show
Series Host1x and VIC support for Tegra186 | expand

Commit Message

Mikko Perttunen Sept. 5, 2017, 8:43 a.m. UTC 
Add a node for the Video Image Compositor on the Tegra186.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
---
v2:
- Fixed reg property in accordance with changed parent cells.

 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Thierry Reding Oct. 19, 2017, 10:50 a.m. UTC | #1 
On Tue, Sep 05, 2017 at 11:43:03AM +0300, Mikko Perttunen wrote:
> Add a node for the Video Image Compositor on the Tegra186.
> 
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
> v2:
> - Fixed reg property in accordance with changed parent cells.
> 
>  arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)

Applied, thanks.

Thierry
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index b1a3e404c7be..584bce64d41f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -371,6 +371,18 @@ 
 		#size-cells = <1>;
 
 		ranges = <0x15000000 0x0 0x15000000 0x01000000>;
+
+		vic@15340000 {
+			compatible = "nvidia,tegra186-vic";
+			reg = <0x15340000 0x40000>;
+			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&bpmp TEGRA186_CLK_VIC>;
+			clock-names = "vic";
+			resets = <&bpmp TEGRA186_RESET_VIC>;
+			reset-names = "vic";
+
+			power-domains = <&bpmp TEGRA186_POWER_DOMAIN_VIC>;
+		};
 	};
 
 	gpu@17000000 {