| Message ID | 1507882137-27841-13-git-send-email-tien.fong.chee@intel.com |
|---|---|
| State | Superseded |
| Delegated to: | Marek Vasut |
| Headers | show |
| Series | Add FPGA, SDRAM, SPL loadfs U-boot & booting to console | expand |
On 10/13/2017 03:08 AM, tien.fong.chee@intel.com wrote: > From: Tien Fong Chee <tien.fong.chee@intel.com> > > This patch enables DDR Kconfig support for Arria 10. > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > --- > arch/arm/mach-socfpga/Kconfig | 1 + > drivers/ddr/altera/Kconfig | 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) > Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Dinh
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 45e5379..3e7a68a 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -40,6 +40,7 @@ config TARGET_SOCFPGA_ARRIA5 config TARGET_SOCFPGA_ARRIA10 bool select SPL_BOARD_INIT if SPL + select ALTERA_SDRAM config TARGET_SOCFPGA_CYCLONE5 bool diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig index 021ec1d..2b28a97 100644 --- a/drivers/ddr/altera/Kconfig +++ b/drivers/ddr/altera/Kconfig @@ -1,5 +1,5 @@ config ALTERA_SDRAM bool "SoCFPGA DDR SDRAM driver" - depends on TARGET_SOCFPGA_GEN5 + depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 help Enable DDR SDRAM controller for the SoCFPGA devices.