| Message ID | 1507883406-31390-2-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Commit | f6859558ca4e18d3a76fafb85924a50026be82fb |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | [U-Boot,1/3] x86: fsp: Consolidate Azalia header file | expand |
On 13.10.2017 10:30, Bin Meng wrote: > At present we directly pass the Azalia config pointer to the FSP UPD. > This updates to use a function to do the stuff, like Braswell does. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > --- > > arch/x86/cpu/baytrail/fsp_configs.c | 15 +++++++++++++-- > arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 2 +- > 2 files changed, 14 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c > index 926f26b..3052fb6 100644 > --- a/arch/x86/cpu/baytrail/fsp_configs.c > +++ b/arch/x86/cpu/baytrail/fsp_configs.c > @@ -120,6 +120,17 @@ const struct azalia_config azalia_config = { > }; > > /** > + * Override the FSP's Azalia configuration data > + * > + * @azalia: pointer to be updated to point to a ROM address where Azalia > + * configuration data is stored > + */ > +static void update_fsp_azalia_configs(struct azalia_config **azalia) > +{ > + *azalia = (struct azalia_config *)&azalia_config; > +} > + > +/** > * Override the FSP's configuration data. > * If the device tree does not specify an integer setting, use the default > * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file. > @@ -137,8 +148,6 @@ void update_fsp_configs(struct fsp_config_data *config, > rt_buf->common.boot_mode = config->common.boot_mode; > rt_buf->common.upd_data = &config->fsp_upd; > > - fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config; > - > node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP); > if (node < 0) { > debug("%s: Cannot find FSP node\n", __func__); > @@ -173,6 +182,8 @@ void update_fsp_configs(struct fsp_config_data *config, > SATA_MODE_AHCI); > fsp_upd->enable_azalia = fdtdec_get_bool(blob, node, > "fsp,enable-azalia"); > + if (fsp_upd->enable_azalia) > + update_fsp_azalia_configs(&fsp_upd->azalia_cfg_ptr); > fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci"); > fsp_upd->lpe_mode = fdtdec_get_int(blob, node, "fsp,lpe-mode", > LPE_MODE_PCI); > diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h > index 8c07b37..e2f0e39 100644 > --- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h > +++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h > @@ -45,7 +45,7 @@ struct __packed upd_region { > uint8_t enable_sata; /* Offset 0x002d */ > uint8_t sata_mode; /* Offset 0x002e */ > uint8_t enable_azalia; /* Offset 0x002f */ > - uint32_t azalia_config_ptr; /* Offset 0x0030 */ > + struct azalia_config *azalia_cfg_ptr; /* Offset 0x0030 */ > uint8_t enable_xhci; /* Offset 0x0034 */ > uint8_t lpe_mode; /* Offset 0x0035 */ > uint8_t lpss_sio_mode; /* Offset 0x0036 */ > Reviewed-by: Stefan Roese <sr@denx.de> Thanks, Stefan
On Fri, Oct 13, 2017 at 7:14 PM, Stefan Roese <sr@denx.de> wrote: > On 13.10.2017 10:30, Bin Meng wrote: >> >> At present we directly pass the Azalia config pointer to the FSP UPD. >> This updates to use a function to do the stuff, like Braswell does. >> >> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >> --- >> >> arch/x86/cpu/baytrail/fsp_configs.c | 15 +++++++++++++-- >> arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 2 +- >> 2 files changed, 14 insertions(+), 3 deletions(-) >> >> diff --git a/arch/x86/cpu/baytrail/fsp_configs.c >> b/arch/x86/cpu/baytrail/fsp_configs.c >> index 926f26b..3052fb6 100644 >> --- a/arch/x86/cpu/baytrail/fsp_configs.c >> +++ b/arch/x86/cpu/baytrail/fsp_configs.c >> @@ -120,6 +120,17 @@ const struct azalia_config azalia_config = { >> }; >> /** >> + * Override the FSP's Azalia configuration data >> + * >> + * @azalia: pointer to be updated to point to a ROM address where >> Azalia >> + * configuration data is stored >> + */ >> +static void update_fsp_azalia_configs(struct azalia_config **azalia) >> +{ >> + *azalia = (struct azalia_config *)&azalia_config; >> +} >> + >> +/** >> * Override the FSP's configuration data. >> * If the device tree does not specify an integer setting, use the >> default >> * provided in Intel's Baytrail_FSP_Gold4.tgz release >> FSP/BayleyBayFsp.bsf file. >> @@ -137,8 +148,6 @@ void update_fsp_configs(struct fsp_config_data >> *config, >> rt_buf->common.boot_mode = config->common.boot_mode; >> rt_buf->common.upd_data = &config->fsp_upd; >> - fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config; >> - >> node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP); >> if (node < 0) { >> debug("%s: Cannot find FSP node\n", __func__); >> @@ -173,6 +182,8 @@ void update_fsp_configs(struct fsp_config_data >> *config, >> SATA_MODE_AHCI); >> fsp_upd->enable_azalia = fdtdec_get_bool(blob, node, >> "fsp,enable-azalia"); >> + if (fsp_upd->enable_azalia) >> + update_fsp_azalia_configs(&fsp_upd->azalia_cfg_ptr); >> fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, >> "fsp,enable-xhci"); >> fsp_upd->lpe_mode = fdtdec_get_int(blob, node, "fsp,lpe-mode", >> LPE_MODE_PCI); >> diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h >> b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h >> index 8c07b37..e2f0e39 100644 >> --- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h >> +++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h >> @@ -45,7 +45,7 @@ struct __packed upd_region { >> uint8_t enable_sata; /* Offset 0x002d */ >> uint8_t sata_mode; /* Offset 0x002e */ >> uint8_t enable_azalia; /* Offset 0x002f */ >> - uint32_t azalia_config_ptr; /* Offset 0x0030 */ >> + struct azalia_config *azalia_cfg_ptr; /* Offset 0x0030 */ >> uint8_t enable_xhci; /* Offset 0x0034 */ >> uint8_t lpe_mode; /* Offset 0x0035 */ >> uint8_t lpss_sio_mode; /* Offset 0x0036 */ >> > > Reviewed-by: Stefan Roese <sr@denx.de> applied to u-boot-x86, thanks!
diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index 926f26b..3052fb6 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -120,6 +120,17 @@ const struct azalia_config azalia_config = { }; /** + * Override the FSP's Azalia configuration data + * + * @azalia: pointer to be updated to point to a ROM address where Azalia + * configuration data is stored + */ +static void update_fsp_azalia_configs(struct azalia_config **azalia) +{ + *azalia = (struct azalia_config *)&azalia_config; +} + +/** * Override the FSP's configuration data. * If the device tree does not specify an integer setting, use the default * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file. @@ -137,8 +148,6 @@ void update_fsp_configs(struct fsp_config_data *config, rt_buf->common.boot_mode = config->common.boot_mode; rt_buf->common.upd_data = &config->fsp_upd; - fsp_upd->azalia_config_ptr = (uint32_t)&azalia_config; - node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_BAYTRAIL_FSP); if (node < 0) { debug("%s: Cannot find FSP node\n", __func__); @@ -173,6 +182,8 @@ void update_fsp_configs(struct fsp_config_data *config, SATA_MODE_AHCI); fsp_upd->enable_azalia = fdtdec_get_bool(blob, node, "fsp,enable-azalia"); + if (fsp_upd->enable_azalia) + update_fsp_azalia_configs(&fsp_upd->azalia_cfg_ptr); fsp_upd->enable_xhci = fdtdec_get_bool(blob, node, "fsp,enable-xhci"); fsp_upd->lpe_mode = fdtdec_get_int(blob, node, "fsp,lpe-mode", LPE_MODE_PCI); diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h index 8c07b37..e2f0e39 100644 --- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h +++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h @@ -45,7 +45,7 @@ struct __packed upd_region { uint8_t enable_sata; /* Offset 0x002d */ uint8_t sata_mode; /* Offset 0x002e */ uint8_t enable_azalia; /* Offset 0x002f */ - uint32_t azalia_config_ptr; /* Offset 0x0030 */ + struct azalia_config *azalia_cfg_ptr; /* Offset 0x0030 */ uint8_t enable_xhci; /* Offset 0x0034 */ uint8_t lpe_mode; /* Offset 0x0035 */ uint8_t lpss_sio_mode; /* Offset 0x0036 */
At present we directly pass the Azalia config pointer to the FSP UPD. This updates to use a function to do the stuff, like Braswell does. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> --- arch/x86/cpu/baytrail/fsp_configs.c | 15 +++++++++++++-- arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 2 +- 2 files changed, 14 insertions(+), 3 deletions(-)