Message ID | 20171010122749.9124-1-clg@kaod.org |
---|---|
State | Accepted, archived |
Headers | show |
Series | [u-boot] Revert "ast-g5: deactivate vbar (for qemu)" | expand |
On Tue, 2017-10-10 at 14:27 +0200, Cédric Le Goater wrote: > This reverts commit a0ca4ecbeae4ae9632ebc67bf5318dd2ea09c94f. > > Support was added to QEMU in : > > commit 91db4642f868 ("target-arm: Add VBAR support to ARM1176 CPUs") > > The work around happens to crash the guest when the vector relocation > is done, with ignore_memory_transaction_failures=false which is > now the default in QEMU. You need a Signed-off-by here. Can you reply with one? Hopefully patchwork will pick it up. Cheers, Andrew > --- > arch/arm/lib/relocate.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S > index 33bcff41ac30..475d503dd9df 100644 > --- a/arch/arm/lib/relocate.S > +++ b/arch/arm/lib/relocate.S > @@ -35,7 +35,7 @@ ENTRY(relocate_vectors) > ldr r1, =V7M_SCB_BASE > str r0, [r1, V7M_SCB_VTOR] > #else > -#if defined(CONFIG_HAS_VBAR) && !defined(CONFIG_ARCH_AST2500) > +#ifdef CONFIG_HAS_VBAR > /* > * If the ARM processor has the security extensions, > * use VBAR to relocate the exception vectors.
On 10/11/2017 07:38 AM, Andrew Jeffery wrote: > On Tue, 2017-10-10 at 14:27 +0200, Cédric Le Goater wrote: >> This reverts commit a0ca4ecbeae4ae9632ebc67bf5318dd2ea09c94f. >> >> Support was added to QEMU in : >> >> commit 91db4642f868 ("target-arm: Add VBAR support to ARM1176 CPUs") >> >> The work around happens to crash the guest when the vector relocation >> is done, with ignore_memory_transaction_failures=false which is >> now the default in QEMU. > > You need a Signed-off-by here. Can you reply with one? Hopefully patchwork will > pick it up. Ah I missed that doing the revert. Signed-off-by: Cédric Le Goater <clg@kaod.org> C. > Cheers, > > Andrew > >> --- >> arch/arm/lib/relocate.S | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S >> index 33bcff41ac30..475d503dd9df 100644 >> --- a/arch/arm/lib/relocate.S >> +++ b/arch/arm/lib/relocate.S >> @@ -35,7 +35,7 @@ ENTRY(relocate_vectors) >> ldr r1, =V7M_SCB_BASE >> str r0, [r1, V7M_SCB_VTOR] >> #else >> -#if defined(CONFIG_HAS_VBAR) && !defined(CONFIG_ARCH_AST2500) >> +#ifdef CONFIG_HAS_VBAR >> /* >> * If the ARM processor has the security extensions, >> * use VBAR to relocate the exception vectors.
On Tue, 2017-10-10 at 14:27 +0200, Cédric Le Goater wrote: > This reverts commit a0ca4ecbeae4ae9632ebc67bf5318dd2ea09c94f. > > Support was added to QEMU in : > > commit 91db4642f868 ("target-arm: Add VBAR support to ARM1176 CPUs") > > The work around happens to crash the guest when the vector relocation > is done, with ignore_memory_transaction_failures=false which is > now the default in QEMU. Applied to v2016.07-aspeed-openbmc with the Signed-off-by. Cheers, Andrew > --- > arch/arm/lib/relocate.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S > index 33bcff41ac30..475d503dd9df 100644 > --- a/arch/arm/lib/relocate.S > +++ b/arch/arm/lib/relocate.S > @@ -35,7 +35,7 @@ ENTRY(relocate_vectors) > > > ldr r1, =V7M_SCB_BASE > > > str r0, [r1, V7M_SCB_VTOR] > #else > -#if defined(CONFIG_HAS_VBAR) && !defined(CONFIG_ARCH_AST2500) > +#ifdef CONFIG_HAS_VBAR > > /* > > * If the ARM processor has the security extensions, > > * use VBAR to relocate the exception vectors.
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S index 33bcff41ac30..475d503dd9df 100644 --- a/arch/arm/lib/relocate.S +++ b/arch/arm/lib/relocate.S @@ -35,7 +35,7 @@ ENTRY(relocate_vectors) ldr r1, =V7M_SCB_BASE str r0, [r1, V7M_SCB_VTOR] #else -#if defined(CONFIG_HAS_VBAR) && !defined(CONFIG_ARCH_AST2500) +#ifdef CONFIG_HAS_VBAR /* * If the ARM processor has the security extensions, * use VBAR to relocate the exception vectors.