| Message ID | 20170928094627.31017-5-romain.izard.pro@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Various patches for SAMA5D2 backup mode | expand |
On Thu, 28 Sep 2017 11:46:23 +0200 Romain Izard <romain.izard.pro@gmail.com> wrote: > During backup mode, the contents of all registers will be cleared as the > SoC will be completely powered down. For a product that boots on NAND > Flash memory, the bootloader will obviously use the related controller > to read the Flash and correct any detected error in the memory, before > handling back control to the kernel's resuming entry point. > > But it does not clean the NAND controller registers after use and on its > side the kernel driver expects the error locator to be powered down and > in a clean state. Add a resume hook for the PMECC error locator, and > reset its registers. > > Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Applied. Thanks, Boris > --- > Changes in v3: > * keep the PMECC disabled when not in use, and use atmel_pmecc_resume to > reset the controller after the bootloader has left it enabled. > > Changes in v4: > * export atmel_pmecc_reset instead of atmel_pmecc_resume > * use the correct pointer in atmel_nand_controller_resume > > drivers/mtd/nand/atmel/nand-controller.c | 3 +++ > drivers/mtd/nand/atmel/pmecc.c | 17 +++++++++-------- > drivers/mtd/nand/atmel/pmecc.h | 1 + > 3 files changed, 13 insertions(+), 8 deletions(-) > > diff --git a/drivers/mtd/nand/atmel/nand-controller.c b/drivers/mtd/nand/atmel/nand-controller.c > index f25eca79f4e5..8afcff9a66ea 100644 > --- a/drivers/mtd/nand/atmel/nand-controller.c > +++ b/drivers/mtd/nand/atmel/nand-controller.c > @@ -2530,6 +2530,9 @@ static __maybe_unused int atmel_nand_controller_resume(struct device *dev) > struct atmel_nand_controller *nc = dev_get_drvdata(dev); > struct atmel_nand *nand; > > + if (nc->pmecc) > + atmel_pmecc_reset(nc->pmecc); > + > list_for_each_entry(nand, &nc->chips, node) { > int i; > > diff --git a/drivers/mtd/nand/atmel/pmecc.c b/drivers/mtd/nand/atmel/pmecc.c > index 146af8218314..0a3f12141c45 100644 > --- a/drivers/mtd/nand/atmel/pmecc.c > +++ b/drivers/mtd/nand/atmel/pmecc.c > @@ -765,6 +765,13 @@ void atmel_pmecc_get_generated_eccbytes(struct atmel_pmecc_user *user, > } > EXPORT_SYMBOL_GPL(atmel_pmecc_get_generated_eccbytes); > > +void atmel_pmecc_reset(struct atmel_pmecc *pmecc) > +{ > + writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL); > + writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL); > +} > +EXPORT_SYMBOL_GPL(atmel_pmecc_reset); > + > int atmel_pmecc_enable(struct atmel_pmecc_user *user, int op) > { > struct atmel_pmecc *pmecc = user->pmecc; > @@ -797,10 +804,7 @@ EXPORT_SYMBOL_GPL(atmel_pmecc_enable); > > void atmel_pmecc_disable(struct atmel_pmecc_user *user) > { > - struct atmel_pmecc *pmecc = user->pmecc; > - > - writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL); > - writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL); > + atmel_pmecc_reset(user->pmecc); > mutex_unlock(&user->pmecc->lock); > } > EXPORT_SYMBOL_GPL(atmel_pmecc_disable); > @@ -855,10 +859,7 @@ static struct atmel_pmecc *atmel_pmecc_create(struct platform_device *pdev, > > /* Disable all interrupts before registering the PMECC handler. */ > writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR); > - > - /* Reset the ECC engine */ > - writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL); > - writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL); > + atmel_pmecc_reset(pmecc); > > return pmecc; > } > diff --git a/drivers/mtd/nand/atmel/pmecc.h b/drivers/mtd/nand/atmel/pmecc.h > index a8ddbfca2ea5..817e0dd9fd15 100644 > --- a/drivers/mtd/nand/atmel/pmecc.h > +++ b/drivers/mtd/nand/atmel/pmecc.h > @@ -61,6 +61,7 @@ atmel_pmecc_create_user(struct atmel_pmecc *pmecc, > struct atmel_pmecc_user_req *req); > void atmel_pmecc_destroy_user(struct atmel_pmecc_user *user); > > +void atmel_pmecc_reset(struct atmel_pmecc *pmecc); > int atmel_pmecc_enable(struct atmel_pmecc_user *user, int op); > void atmel_pmecc_disable(struct atmel_pmecc_user *user); > int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user); -- To unsubscribe from this list: send the line "unsubscribe linux-pwm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/mtd/nand/atmel/nand-controller.c b/drivers/mtd/nand/atmel/nand-controller.c index f25eca79f4e5..8afcff9a66ea 100644 --- a/drivers/mtd/nand/atmel/nand-controller.c +++ b/drivers/mtd/nand/atmel/nand-controller.c @@ -2530,6 +2530,9 @@ static __maybe_unused int atmel_nand_controller_resume(struct device *dev) struct atmel_nand_controller *nc = dev_get_drvdata(dev); struct atmel_nand *nand; + if (nc->pmecc) + atmel_pmecc_reset(nc->pmecc); + list_for_each_entry(nand, &nc->chips, node) { int i; diff --git a/drivers/mtd/nand/atmel/pmecc.c b/drivers/mtd/nand/atmel/pmecc.c index 146af8218314..0a3f12141c45 100644 --- a/drivers/mtd/nand/atmel/pmecc.c +++ b/drivers/mtd/nand/atmel/pmecc.c @@ -765,6 +765,13 @@ void atmel_pmecc_get_generated_eccbytes(struct atmel_pmecc_user *user, } EXPORT_SYMBOL_GPL(atmel_pmecc_get_generated_eccbytes); +void atmel_pmecc_reset(struct atmel_pmecc *pmecc) +{ + writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL); + writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL); +} +EXPORT_SYMBOL_GPL(atmel_pmecc_reset); + int atmel_pmecc_enable(struct atmel_pmecc_user *user, int op) { struct atmel_pmecc *pmecc = user->pmecc; @@ -797,10 +804,7 @@ EXPORT_SYMBOL_GPL(atmel_pmecc_enable); void atmel_pmecc_disable(struct atmel_pmecc_user *user) { - struct atmel_pmecc *pmecc = user->pmecc; - - writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL); - writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL); + atmel_pmecc_reset(user->pmecc); mutex_unlock(&user->pmecc->lock); } EXPORT_SYMBOL_GPL(atmel_pmecc_disable); @@ -855,10 +859,7 @@ static struct atmel_pmecc *atmel_pmecc_create(struct platform_device *pdev, /* Disable all interrupts before registering the PMECC handler. */ writel(0xffffffff, pmecc->regs.base + ATMEL_PMECC_IDR); - - /* Reset the ECC engine */ - writel(PMECC_CTRL_RST, pmecc->regs.base + ATMEL_PMECC_CTRL); - writel(PMECC_CTRL_DISABLE, pmecc->regs.base + ATMEL_PMECC_CTRL); + atmel_pmecc_reset(pmecc); return pmecc; } diff --git a/drivers/mtd/nand/atmel/pmecc.h b/drivers/mtd/nand/atmel/pmecc.h index a8ddbfca2ea5..817e0dd9fd15 100644 --- a/drivers/mtd/nand/atmel/pmecc.h +++ b/drivers/mtd/nand/atmel/pmecc.h @@ -61,6 +61,7 @@ atmel_pmecc_create_user(struct atmel_pmecc *pmecc, struct atmel_pmecc_user_req *req); void atmel_pmecc_destroy_user(struct atmel_pmecc_user *user); +void atmel_pmecc_reset(struct atmel_pmecc *pmecc); int atmel_pmecc_enable(struct atmel_pmecc_user *user, int op); void atmel_pmecc_disable(struct atmel_pmecc_user *user); int atmel_pmecc_wait_rdy(struct atmel_pmecc_user *user);
During backup mode, the contents of all registers will be cleared as the SoC will be completely powered down. For a product that boots on NAND Flash memory, the bootloader will obviously use the related controller to read the Flash and correct any detected error in the memory, before handling back control to the kernel's resuming entry point. But it does not clean the NAND controller registers after use and on its side the kernel driver expects the error locator to be powered down and in a clean state. Add a resume hook for the PMECC error locator, and reset its registers. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> --- Changes in v3: * keep the PMECC disabled when not in use, and use atmel_pmecc_resume to reset the controller after the bootloader has left it enabled. Changes in v4: * export atmel_pmecc_reset instead of atmel_pmecc_resume * use the correct pointer in atmel_nand_controller_resume drivers/mtd/nand/atmel/nand-controller.c | 3 +++ drivers/mtd/nand/atmel/pmecc.c | 17 +++++++++-------- drivers/mtd/nand/atmel/pmecc.h | 1 + 3 files changed, 13 insertions(+), 8 deletions(-)