| Message ID | 20170906070047.6714-1-vaibhav@linux.vnet.ibm.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [v2] capi: Mask Psl Credit timeout error for P9 | expand |
Le 06/09/2017 à 09:00, Vaibhav Jain a écrit : > Mask the PSL credit timeout error in CAPP FIR Mask register > bit(46). As per the h/w team this error is now deprecated and shouldn't > cause any fir-action for P9. > > Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> > --- > Changelog: > > v2 -> Switched to xscom_write_mask() for updating the bit [Steward] > --- > > hw/phb4.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/hw/phb4.c b/hw/phb4.c > index 1e148e0b..6611602e 100644 > --- a/hw/phb4.c > +++ b/hw/phb4.c > @@ -3431,6 +3431,10 @@ static void phb4_init_capp_regs(struct phb4 *p) > 0xFFFFF00E00000000); > } > > + /* Mask the CAPP PSL Credit Timeout Register error */ > + xscom_write_mask(p->chip_id, CAPP_FIR_MASK + offset, > + PPC_BIT(46), PPC_BIT(46)); > + > /* Deassert TLBI_FENCED and tlbi_psl_is_dead */ > xscom_write(p->chip_id, CAPP_ERR_STATUS_CTRL + offset, 0); > } Acked-by: Christophe Lombard<clombard@linux.vnet.ibm.com> <html> <head> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> </head> <body text="#000000" bgcolor="#FFFFFF"> <div class="moz-cite-prefix">Le 06/09/2017 à 09:00, Vaibhav Jain a écrit :<br> </div> <blockquote type="cite" cite="mid:20170906070047.6714-1-vaibhav@linux.vnet.ibm.com"> <pre wrap="">Mask the PSL credit timeout error in CAPP FIR Mask register bit(46). As per the h/w team this error is now deprecated and shouldn't cause any fir-action for P9. Signed-off-by: Vaibhav Jain <a class="moz-txt-link-rfc2396E" href="mailto:vaibhav@linux.vnet.ibm.com"><vaibhav@linux.vnet.ibm.com></a> --- Changelog: v2 -> Switched to xscom_write_mask() for updating the bit [Steward] --- hw/phb4.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/phb4.c b/hw/phb4.c index 1e148e0b..6611602e 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -3431,6 +3431,10 @@ static void phb4_init_capp_regs(struct phb4 *p) 0xFFFFF00E00000000); } + /* Mask the CAPP PSL Credit Timeout Register error */ + xscom_write_mask(p->chip_id, CAPP_FIR_MASK + offset, + PPC_BIT(46), PPC_BIT(46)); + /* Deassert TLBI_FENCED and tlbi_psl_is_dead */ xscom_write(p->chip_id, CAPP_ERR_STATUS_CTRL + offset, 0); } </pre> </blockquote> <br> <pre>Acked-by: Christophe Lombard <a class="moz-txt-link-rfc2396E" href="mailto:clombard@linux.vnet.ibm.com"><clombard@linux.vnet.ibm.com></a></pre> </body> </html>
christophe lombard <clombard@linux.vnet.ibm.com> writes: > Le 06/09/2017 à 09:00, Vaibhav Jain a écrit : >> Mask the PSL credit timeout error in CAPP FIR Mask register >> bit(46). As per the h/w team this error is now deprecated and shouldn't >> cause any fir-action for P9. >> >> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> >> --- >> Changelog: >> >> v2 -> Switched to xscom_write_mask() for updating the bit [Steward] >> --- >> >> hw/phb4.c | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/hw/phb4.c b/hw/phb4.c >> index 1e148e0b..6611602e 100644 >> --- a/hw/phb4.c >> +++ b/hw/phb4.c >> @@ -3431,6 +3431,10 @@ static void phb4_init_capp_regs(struct phb4 *p) >> 0xFFFFF00E00000000); >> } >> >> + /* Mask the CAPP PSL Credit Timeout Register error */ >> + xscom_write_mask(p->chip_id, CAPP_FIR_MASK + offset, >> + PPC_BIT(46), PPC_BIT(46)); >> + >> /* Deassert TLBI_FENCED and tlbi_psl_is_dead */ >> xscom_write(p->chip_id, CAPP_ERR_STATUS_CTRL + offset, 0); >> } > > Acked-by: Christophe Lombard<clombard@linux.vnet.ibm.com> You may want to tune your mail client configuration, it was sending multipart/alternative with a text/html part, which isn't so great generally, but in this case it seems to have confused patchwork slightly.
Vaibhav Jain <vaibhav@linux.vnet.ibm.com> writes: > Mask the PSL credit timeout error in CAPP FIR Mask register > bit(46). As per the h/w team this error is now deprecated and shouldn't > cause any fir-action for P9. > > Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> > --- > Changelog: > > v2 -> Switched to xscom_write_mask() for updating the bit [Steward] > --- > > hw/phb4.c | 4 ++++ > 1 file changed, 4 insertions(+) Thanks, merged to master as of 80c8e4ad6da01438e22949076a798f89d0cb003a
diff --git a/hw/phb4.c b/hw/phb4.c index 1e148e0b..6611602e 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -3431,6 +3431,10 @@ static void phb4_init_capp_regs(struct phb4 *p) 0xFFFFF00E00000000); } + /* Mask the CAPP PSL Credit Timeout Register error */ + xscom_write_mask(p->chip_id, CAPP_FIR_MASK + offset, + PPC_BIT(46), PPC_BIT(46)); + /* Deassert TLBI_FENCED and tlbi_psl_is_dead */ xscom_write(p->chip_id, CAPP_ERR_STATUS_CTRL + offset, 0); }
Mask the PSL credit timeout error in CAPP FIR Mask register bit(46). As per the h/w team this error is now deprecated and shouldn't cause any fir-action for P9. Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> --- Changelog: v2 -> Switched to xscom_write_mask() for updating the bit [Steward] --- hw/phb4.c | 4 ++++ 1 file changed, 4 insertions(+)