Message ID | 1492679026-22480-1-git-send-email-kever.yang@rock-chips.com |
---|---|
State | Accepted |
Commit | fa1392a236dfebbe938a48f124c8332759aba8e5 |
Delegated to: | Simon Glass |
Headers | show |
On 20 April 2017 at 03:03, Kever Yang <kever.yang@rock-chips.com> wrote: > There are 3 regions used by rk3399 ATF: > - bl31 code, located at 0x10000; > - cortex-m0 code and data, located at 0xff8c0000; > - bl31 data, located at 0xff8c1000 ~ 0xff8c4000; > > SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory > for ATF data, or else there will be memory corrupt after SPL > loads the ATF image. > > More detail about cortex-M0 code in ATF: > https://github.com/ARM-software/arm-trusted-firmware/commit/ > 8382e17c4c6bffd15119dfce1ee4372e3c1a7890 > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > Changes in v3: > - grammar fix by Andreas's comment > > Changes in v2: > - use Kconfig for the reserved memory size > > arch/arm/include/asm/arch-rockchip/boot0.h | 4 ++++ > arch/arm/mach-rockchip/Kconfig | 8 ++++++++ > 2 files changed, 12 insertions(+) > Acked-by: Simon Glass <sjg@chromium.org>
On 20 April 2017 at 03:03, Kever Yang <kever.yang@rock-chips.com> wrote: > There are 3 regions used by rk3399 ATF: > - bl31 code, located at 0x10000; > - cortex-m0 code and data, located at 0xff8c0000; > - bl31 data, located at 0xff8c1000 ~ 0xff8c4000; > > SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory > for ATF data, or else there will be memory corrupt after SPL > loads the ATF image. > > More detail about cortex-M0 code in ATF: > https://github.com/ARM-software/arm-trusted-firmware/commit/ > 8382e17c4c6bffd15119dfce1ee4372e3c1a7890 > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > Changes in v3: > - grammar fix by Andreas's comment > > Changes in v2: > - use Kconfig for the reserved memory size > > arch/arm/include/asm/arch-rockchip/boot0.h | 4 ++++ > arch/arm/mach-rockchip/Kconfig | 8 ++++++++ > 2 files changed, 12 insertions(+) > Acked-by: Simon Glass <sjg@chromium.org> Applied to u-boot-rockchip/next, thanks!
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h index 8d7bc9a..7346876 100644 --- a/arch/arm/include/asm/arch-rockchip/boot0.h +++ b/arch/arm/include/asm/arch-rockchip/boot0.h @@ -16,3 +16,7 @@ .space 0x4 /* space for the 'RK33' */ #endif b reset + +#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD) + .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */ +#endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index af0796d..da280f6 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -72,6 +72,14 @@ config ROCKCHIP_SPL_BACK_TO_BROM SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. +config ROCKCHIP_SPL_RESERVE_IRAM + hex "Size of IRAM reserved in SPL" + default 0x4000 + help + SPL may need reserve memory for firmware loaded by SPL, whose load + address is in IRAM and may overlay with SPL text area if not + reserved. + config ROCKCHIP_BROM_HELPER bool
There are 3 regions used by rk3399 ATF: - bl31 code, located at 0x10000; - cortex-m0 code and data, located at 0xff8c0000; - bl31 data, located at 0xff8c1000 ~ 0xff8c4000; SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory for ATF data, or else there will be memory corrupt after SPL loads the ATF image. More detail about cortex-M0 code in ATF: https://github.com/ARM-software/arm-trusted-firmware/commit/ 8382e17c4c6bffd15119dfce1ee4372e3c1a7890 Signed-off-by: Kever Yang <kever.yang@rock-chips.com> --- Changes in v3: - grammar fix by Andreas's comment Changes in v2: - use Kconfig for the reserved memory size arch/arm/include/asm/arch-rockchip/boot0.h | 4 ++++ arch/arm/mach-rockchip/Kconfig | 8 ++++++++ 2 files changed, 12 insertions(+)