Message ID | 1491998237-22089-1-git-send-email-tim.gardner@canonical.com |
---|---|
State | New |
Headers | show |
On 12/04/17 12:57, Tim Gardner wrote: > From: Frederic Barrat <fbarrat@linux.vnet.ibm.com> > > BugLink: http://bugs.launchpad.net/bugs/1681469 > > Commit 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl") converted local > TLB invalidates to global if the cxl driver is active. This is necessary > because the CAPP snoops invalidations to forward them to the PSL on the > cxl adapter. However one path was forgotten. native_flush_hash_range() > still does local TLB invalidates, as found out the hard way recently. > > This patch fixes it by following the same logic as previously: if the > cxl driver is active, the local TLB invalidates are 'upgraded' to > global. > > Fixes: 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl") > Cc: stable@vger.kernel.org # v3.18+ > Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> > Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> > (cherry picked from commit 88b1bf7268f56887ca88eb09c6fb0f4fc970121a) > Signed-off-by: Tim Gardner <tim.gardner@canonical.com> > --- > arch/powerpc/mm/hash_native_64.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c > index cc33260..65bb8f3 100644 > --- a/arch/powerpc/mm/hash_native_64.c > +++ b/arch/powerpc/mm/hash_native_64.c > @@ -638,6 +638,10 @@ static void native_flush_hash_range(unsigned long number, int local) > unsigned long psize = batch->psize; > int ssize = batch->ssize; > int i; > + unsigned int use_local; > + > + use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && > + mmu_psize_defs[psize].tlbiel && !cxl_ctx_in_use(); > > local_irq_save(flags); > > @@ -667,8 +671,7 @@ static void native_flush_hash_range(unsigned long number, int local) > } pte_iterate_hashed_end(); > } > > - if (mmu_has_feature(MMU_FTR_TLBIEL) && > - mmu_psize_defs[psize].tlbiel && local) { > + if (use_local) { > asm volatile("ptesync":::"memory"); > for (i = 0; i < number; i++) { > vpn = batch->vpn[i]; > Upstream cherry pick, make sense with respect to commit message and reference to 4c6d9acce1f4 and is a stable fix, so... Acked-by: Colin Ian King <colin.king@canonical.com>
Already included by most recent upstream stable update (4.4.60) for Xenial.
On Wed, Apr 12, 2017 at 05:57:17AM -0600, Tim Gardner wrote: > From: Frederic Barrat <fbarrat@linux.vnet.ibm.com> > > BugLink: http://bugs.launchpad.net/bugs/1681469 > > Commit 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl") converted local > TLB invalidates to global if the cxl driver is active. This is necessary > because the CAPP snoops invalidations to forward them to the PSL on the > cxl adapter. However one path was forgotten. native_flush_hash_range() > still does local TLB invalidates, as found out the hard way recently. > > This patch fixes it by following the same logic as previously: if the > cxl driver is active, the local TLB invalidates are 'upgraded' to > global. > > Fixes: 4c6d9acce1f4 ("powerpc/mm: Add hooks for cxl") > Cc: stable@vger.kernel.org # v3.18+ > Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> > Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> > (cherry picked from commit 88b1bf7268f56887ca88eb09c6fb0f4fc970121a) > Signed-off-by: Tim Gardner <tim.gardner@canonical.com> This was applied to zesty as part of the 4.10.10 stable update.
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index cc33260..65bb8f3 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c @@ -638,6 +638,10 @@ static void native_flush_hash_range(unsigned long number, int local) unsigned long psize = batch->psize; int ssize = batch->ssize; int i; + unsigned int use_local; + + use_local = local && mmu_has_feature(MMU_FTR_TLBIEL) && + mmu_psize_defs[psize].tlbiel && !cxl_ctx_in_use(); local_irq_save(flags); @@ -667,8 +671,7 @@ static void native_flush_hash_range(unsigned long number, int local) } pte_iterate_hashed_end(); } - if (mmu_has_feature(MMU_FTR_TLBIEL) && - mmu_psize_defs[psize].tlbiel && local) { + if (use_local) { asm volatile("ptesync":::"memory"); for (i = 0; i < number; i++) { vpn = batch->vpn[i];