| Message ID | 1491830626-11250-1-git-send-email-leitao@debian.org |
|---|---|
| State | New |
| Headers | show |
On Mon, Apr 10, 2017 at 10:23:45AM -0300, Breno Leitao wrote: > From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> > > BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1681429 > > For fullmm tlb flush, we do a flush with RIC_FLUSH_ALL which will invalidate all > related caches (radix__tlb_flush()). Hence the pwc flush is not needed. > > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > Acked-by: Anton Blanchard <anton@samba.org> > Signed-off-by: Breno Leitao <breno.leitao@gmail.com> Both patches are straight-forward and limited in scope. For both: Acked-by: Seth Forshee <seth.forshee@canonical.com>
On 10/04/17 14:23, Breno Leitao wrote: > From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> > > BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1681429 > > For fullmm tlb flush, we do a flush with RIC_FLUSH_ALL which will invalidate all > related caches (radix__tlb_flush()). Hence the pwc flush is not needed. > > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > Acked-by: Anton Blanchard <anton@samba.org> > Signed-off-by: Breno Leitao <breno.leitao@gmail.com> > --- > arch/powerpc/mm/tlb-radix.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c > index 952713d6cf04..74f17e3c7cbe 100644 > --- a/arch/powerpc/mm/tlb-radix.c > +++ b/arch/powerpc/mm/tlb-radix.c > @@ -129,6 +129,12 @@ void radix__local_flush_tlb_pwc(struct mmu_gather *tlb, unsigned long addr) > { > unsigned long pid; > struct mm_struct *mm = tlb->mm; > + /* > + * If we are doing a full mm flush, we will do a tlb flush > + * with RIC_FLUSH_ALL later. > + */ > + if (tlb->fullmm) > + return; > > preempt_disable(); > > @@ -195,6 +201,12 @@ void radix__flush_tlb_pwc(struct mmu_gather *tlb, unsigned long addr) > unsigned long pid; > struct mm_struct *mm = tlb->mm; > > + /* > + * If we are doing a full mm flush, we will do a tlb flush > + * with RIC_FLUSH_ALL later. > + */ > + if (tlb->fullmm) > + return; > preempt_disable(); > > pid = mm->context.id; > Patches 1 and 2 are clear optimizations and are arch-specific. Both appear OK to me. Acked-by: Colin Ian King <colin.king@canonical.com>
Applied to zesty master-next.
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c index 952713d6cf04..74f17e3c7cbe 100644 --- a/arch/powerpc/mm/tlb-radix.c +++ b/arch/powerpc/mm/tlb-radix.c @@ -129,6 +129,12 @@ void radix__local_flush_tlb_pwc(struct mmu_gather *tlb, unsigned long addr) { unsigned long pid; struct mm_struct *mm = tlb->mm; + /* + * If we are doing a full mm flush, we will do a tlb flush + * with RIC_FLUSH_ALL later. + */ + if (tlb->fullmm) + return; preempt_disable(); @@ -195,6 +201,12 @@ void radix__flush_tlb_pwc(struct mmu_gather *tlb, unsigned long addr) unsigned long pid; struct mm_struct *mm = tlb->mm; + /* + * If we are doing a full mm flush, we will do a tlb flush + * with RIC_FLUSH_ALL later. + */ + if (tlb->fullmm) + return; preempt_disable(); pid = mm->context.id;