@@ -12311,3 +12311,67 @@
[(set_attr "type" "ssecvt")
(set_attr "prefix" "vex")
(set_attr "mode" "V8SF")])
+
+(define_insn "*vec_concat_lo_<mode>_avx"
+ [(set (match_operand:AVX256MODE4P 0 "register_operand" "=x")
+ (vec_concat:AVX256MODE4P
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE4P 1 "register_operand" "x")
+ (parallel [(const_int 0) (const_int 1)]))
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE4P 2 "nonimmediate_operand" "xm")
+ (parallel [(const_int 0) (const_int 1)]))))]
+ "TARGET_AVX"
+ "vperm2f128\t{$0x20, %2, %1, %0|%0, %1, %2, 0x20}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix" "vex")
+ (set_attr "mode" "V8SF")])
+
+(define_insn "*vec_concat_hi_<mode>_avx"
+ [(set (match_operand:AVX256MODE4P 0 "register_operand" "=x")
+ (vec_concat:AVX256MODE4P
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE4P 1 "register_operand" "x")
+ (parallel [(const_int 2) (const_int 3)]))
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE4P 2 "nonimmediate_operand" "xm")
+ (parallel [(const_int 2) (const_int 3)]))))]
+ "TARGET_AVX"
+ "vperm2f128\t{$0x31, %2, %1, %0|%0, %1, %2, 0x31}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix" "vex")
+ (set_attr "mode" "V8SF")])
+
+(define_insn "*vec_concat_lo_<mode>_avx"
+ [(set (match_operand:AVX256MODE8P 0 "register_operand" "=x")
+ (vec_concat:AVX256MODE8P
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE8P 1 "register_operand" "x")
+ (parallel [(const_int 0) (const_int 1)
+ (const_int 2) (const_int 3)]))
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE8P 2 "nonimmediate_operand" "xm")
+ (parallel [(const_int 0) (const_int 1)
+ (const_int 2) (const_int 3)]))))]
+ "TARGET_AVX"
+ "vperm2f128\t{$0x20, %2, %1, %0|%0, %1, %2, 0x20}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix" "vex")
+ (set_attr "mode" "V8SF")])
+
+(define_insn "*vec_concat_hi_<mode>_avx"
+ [(set (match_operand:AVX256MODE8P 0 "register_operand" "=x")
+ (vec_concat:AVX256MODE8P
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE8P 1 "register_operand" "x")
+ (parallel [(const_int 4) (const_int 5)
+ (const_int 6) (const_int 7)]))
+ (vec_select:<avxhalfvecmode>
+ (match_operand:AVX256MODE8P 2 "nonimmediate_operand" "xm")
+ (parallel [(const_int 4) (const_int 5)
+ (const_int 6) (const_int 7)]))))]
+ "TARGET_AVX"
+ "vperm2f128\t{$0x31, %2, %1, %0|%0, %1, %2, 00x31}"
+ [(set_attr "type" "sselog")
+ (set_attr "prefix" "vex")
+ (set_attr "mode" "V8SF")])
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx -mtune=generic" } */
+
+double val1[4][2], val2[4][2], chk[4][2];
+
+void
+foo (void)
+{
+ int i, j;
+ for (i = 0; i < 4; i++)
+ {
+ double tmp = 0;
+ for (j = 0; j < 2; j++)
+ tmp += val1[i][j] * val2[i][j];
+ for (j = 0; j < 2; j++)
+ chk[i][j] = tmp;
+ }
+}