| Message ID | 1488865438-5254-1-git-send-email-shilpa.bhat@linux.vnet.ibm.com |
|---|---|
| State | Accepted |
| Headers | show |
* Shilpa Bhat <shilpa.bhat@linux.vnet.ibm.com> [2017-03-07 11:13:58]: > Only stop[0,1]_lite idle states are supported in DD1. And stop1 with > ESL=EC=1 is used for CPU hotplug in DD1. > > Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> > --- > Changes from V3: > - Define new array of idle states for P9 DD1. > > Changes from V2: > - Disbale Stop2 state for DD1 > > Changes from V1: > - Removed only_lite variable. > - Moved the ESL check inside "if (has_stop_inst)" > hw/slw.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++---- > 1 file changed, 57 insertions(+), 4 deletions(-) > > diff --git a/hw/slw.c b/hw/slw.c > index bea1028..210be8d 100644 > --- a/hw/slw.c > +++ b/hw/slw.c > @@ -621,6 +621,55 @@ static struct cpu_idle_states power9_cpu_idle_states[] = { > .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK }, > > }; > + > +/* Idle states supported for P9 DD1 */ > +static struct cpu_idle_states power9_dd1_cpu_idle_states[] = { > + { > + .name = "stop0_lite", > + .latency_ns = 200, > + .residency_ns = 2000, > + .flags = 0*OPAL_PM_DEC_STOP \ > + | 0*OPAL_PM_TIMEBASE_STOP \ > + | 0*OPAL_PM_LOSE_USER_CONTEXT \ > + | 0*OPAL_PM_LOSE_HYP_CONTEXT \ > + | 0*OPAL_PM_LOSE_FULL_CONTEXT \ > + | 1*OPAL_PM_STOP_INST_FAST, > + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(0) \ > + | OPAL_PM_PSSCR_MTL(3) \ > + | OPAL_PM_PSSCR_TR(3), > + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK }, > + { > + .name = "stop1_lite", > + .latency_ns = 4900, > + .residency_ns = 49000, > + .flags = 0*OPAL_PM_DEC_STOP \ > + | 0*OPAL_PM_TIMEBASE_STOP \ > + | 1*OPAL_PM_LOSE_USER_CONTEXT \ > + | 0*OPAL_PM_LOSE_HYP_CONTEXT \ > + | 0*OPAL_PM_LOSE_FULL_CONTEXT \ > + | 1*OPAL_PM_STOP_INST_FAST, > + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \ > + | OPAL_PM_PSSCR_MTL(3) \ > + | OPAL_PM_PSSCR_TR(3), > + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK }, > + { Cpuidle will use the above two states. > + .name = "stop1", > + .latency_ns = 2050000, > + .residency_ns = 50000, > + .flags = 0*OPAL_PM_DEC_STOP \ > + | 0*OPAL_PM_TIMEBASE_STOP \ > + | 1*OPAL_PM_LOSE_USER_CONTEXT \ > + | 0*OPAL_PM_LOSE_HYP_CONTEXT \ > + | 0*OPAL_PM_LOSE_FULL_CONTEXT \ > + | 1*OPAL_PM_STOP_INST_FAST, > + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \ > + | OPAL_PM_PSSCR_MTL(3) \ > + | OPAL_PM_PSSCR_TR(3) \ > + | OPAL_PM_PSSCR_ESL \ > + | OPAL_PM_PSSCR_EC, > + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK } > +}; Cpuhotplug will use the stop1 with ESL=1 and the decision in (upstream) kernel is made using the larger latency value. Hence no kernel change is required to pick the above ESL state for hotplug only. --Vaidy
Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> writes: > Only stop[0,1]_lite idle states are supported in DD1. And stop1 with > ESL=EC=1 is used for CPU hotplug in DD1. > > Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Thanks, merged to master as of 84368bbf8c0bb1127ce08e1f5cd16832d84350f5
diff --git a/hw/slw.c b/hw/slw.c index bea1028..210be8d 100644 --- a/hw/slw.c +++ b/hw/slw.c @@ -621,6 +621,55 @@ static struct cpu_idle_states power9_cpu_idle_states[] = { .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK }, }; + +/* Idle states supported for P9 DD1 */ +static struct cpu_idle_states power9_dd1_cpu_idle_states[] = { + { + .name = "stop0_lite", + .latency_ns = 200, + .residency_ns = 2000, + .flags = 0*OPAL_PM_DEC_STOP \ + | 0*OPAL_PM_TIMEBASE_STOP \ + | 0*OPAL_PM_LOSE_USER_CONTEXT \ + | 0*OPAL_PM_LOSE_HYP_CONTEXT \ + | 0*OPAL_PM_LOSE_FULL_CONTEXT \ + | 1*OPAL_PM_STOP_INST_FAST, + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(0) \ + | OPAL_PM_PSSCR_MTL(3) \ + | OPAL_PM_PSSCR_TR(3), + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK }, + { + .name = "stop1_lite", + .latency_ns = 4900, + .residency_ns = 49000, + .flags = 0*OPAL_PM_DEC_STOP \ + | 0*OPAL_PM_TIMEBASE_STOP \ + | 1*OPAL_PM_LOSE_USER_CONTEXT \ + | 0*OPAL_PM_LOSE_HYP_CONTEXT \ + | 0*OPAL_PM_LOSE_FULL_CONTEXT \ + | 1*OPAL_PM_STOP_INST_FAST, + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \ + | OPAL_PM_PSSCR_MTL(3) \ + | OPAL_PM_PSSCR_TR(3), + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK }, + { + .name = "stop1", + .latency_ns = 2050000, + .residency_ns = 50000, + .flags = 0*OPAL_PM_DEC_STOP \ + | 0*OPAL_PM_TIMEBASE_STOP \ + | 1*OPAL_PM_LOSE_USER_CONTEXT \ + | 0*OPAL_PM_LOSE_HYP_CONTEXT \ + | 0*OPAL_PM_LOSE_FULL_CONTEXT \ + | 1*OPAL_PM_STOP_INST_FAST, + .pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \ + | OPAL_PM_PSSCR_MTL(3) \ + | OPAL_PM_PSSCR_TR(3) \ + | OPAL_PM_PSSCR_ESL \ + | OPAL_PM_PSSCR_EC, + .pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK } +}; + /* Add device tree properties to describe idle states */ void add_cpu_idle_state_properties(void) { @@ -674,15 +723,19 @@ void add_cpu_idle_state_properties(void) assert(chip); if (chip->type == PROC_CHIP_P9_NIMBUS || chip->type == PROC_CHIP_P9_CUMULUS) { - states = power9_cpu_idle_states; - nr_states = ARRAY_SIZE(power9_cpu_idle_states); - has_stop_inst = true; + if (chip->ec_level == 0x10) { + states = power9_dd1_cpu_idle_states; + nr_states = ARRAY_SIZE(power9_dd1_cpu_idle_states); + } else { + states = power9_cpu_idle_states; + nr_states = ARRAY_SIZE(power9_cpu_idle_states); + } + has_stop_inst = true; stop_levels = dt_prop_get_u32_def(power_mgt, "ibm,enabled-stop-levels", 0); if (!stop_levels) prerror("SLW: No stop levels available. Power saving is disabled!\n"); - } else if (chip->type == PROC_CHIP_P8_MURANO || chip->type == PROC_CHIP_P8_VENICE || chip->type == PROC_CHIP_P8_NAPLES) {
Only stop[0,1]_lite idle states are supported in DD1. And stop1 with ESL=EC=1 is used for CPU hotplug in DD1. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> --- Changes from V3: - Define new array of idle states for P9 DD1. Changes from V2: - Disbale Stop2 state for DD1 Changes from V1: - Removed only_lite variable. - Moved the ESL check inside "if (has_stop_inst)" hw/slw.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 57 insertions(+), 4 deletions(-)