| Message ID | 08953fb6-c332-ef29-2614-6335570023be@maciej.szmigiero.name |
|---|---|
| State | New |
| Headers | show |
On Thu, Jan 12, 2017 at 07:08:53PM +0100, Maciej S. Szmigiero wrote: > Since commit 1107d065fdf1 ("tpm_tis: Introduce intermediate layer for TPM > access") Atmel 3203 TPM on ThinkPad X61S (TPM firmware version 13.9) no > longer works. > It turns out the initialization proceeds fine until we get and start using > chip-reported timeouts - and the chip reports C and D timeouts of zero. > > Since these are clearly not long enough let's add an override for them > to TPM TIS default values, just as we do for Atmel 3204. > A and B timeouts are set to the same values as the chip normally reports. > > Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> > static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { > + /* Atmel 3203 */ > + { 0x32031114, { (10*1000), (10*1000), > + (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, > /* Atmel 3204 */ > { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), > (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, Can you also add a check for 0 timeouts in the core code and print a FW_BUG :\ Jason ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi
Hi Jason, On 12.01.2017 19:42, Jason Gunthorpe wrote: > On Thu, Jan 12, 2017 at 07:08:53PM +0100, Maciej S. Szmigiero wrote: >> Since commit 1107d065fdf1 ("tpm_tis: Introduce intermediate layer for TPM >> access") Atmel 3203 TPM on ThinkPad X61S (TPM firmware version 13.9) no >> longer works. >> It turns out the initialization proceeds fine until we get and start using >> chip-reported timeouts - and the chip reports C and D timeouts of zero. >> >> Since these are clearly not long enough let's add an override for them >> to TPM TIS default values, just as we do for Atmel 3204. >> A and B timeouts are set to the same values as the chip normally reports. >> >> Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> > >> static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { >> + /* Atmel 3203 */ >> + { 0x32031114, { (10*1000), (10*1000), >> + (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, >> /* Atmel 3204 */ >> { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), >> (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, > > Can you also add a check for 0 timeouts in the core code and print a > FW_BUG :\ Hmm, I dug in history of tpm-interface.c and the code had actually rejected zero timeouts until commit 8e54caf407b98e (this is the commit that introduced the Atmel 3204 workaround) and let default timeout values remain instead (it looks like they were exactly like these in above override at that time). Did Atmel 3204 report wrong but non-zero timeouts? > Jason Maciej ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi
On Thu, Jan 12, 2017 at 09:09:33PM +0100, Maciej S. Szmigiero wrote: > Hmm, I dug in history of tpm-interface.c and the code had actually rejected > zero timeouts until commit 8e54caf407b98e (this is the commit that > introduced the Atmel 3204 workaround) and let default timeout values remain > instead (it looks like they were exactly like these in above override at > that time). The model changed around then.. Just printing if the timeout is 0 is enough for now.. > Did Atmel 3204 report wrong but non-zero timeouts? Yes, I think it may have.. Jason ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi
On Thu, Jan 12, 2017 at 09:09:33PM +0100, Maciej S. Szmigiero wrote: > Hi Jason, > > On 12.01.2017 19:42, Jason Gunthorpe wrote: > > On Thu, Jan 12, 2017 at 07:08:53PM +0100, Maciej S. Szmigiero wrote: > >> Since commit 1107d065fdf1 ("tpm_tis: Introduce intermediate layer for TPM > >> access") Atmel 3203 TPM on ThinkPad X61S (TPM firmware version 13.9) no > >> longer works. > >> It turns out the initialization proceeds fine until we get and start using > >> chip-reported timeouts - and the chip reports C and D timeouts of zero. > >> > >> Since these are clearly not long enough let's add an override for them > >> to TPM TIS default values, just as we do for Atmel 3204. > >> A and B timeouts are set to the same values as the chip normally reports. > >> > >> Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> > > > >> static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { > >> + /* Atmel 3203 */ > >> + { 0x32031114, { (10*1000), (10*1000), > >> + (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, > >> /* Atmel 3204 */ > >> { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), > >> (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, > > > > Can you also add a check for 0 timeouts in the core code and print a > > FW_BUG :\ > > Hmm, I dug in history of tpm-interface.c and the code had actually rejected > zero timeouts until commit 8e54caf407b98e (this is the commit that > introduced the Atmel 3204 workaround) and let default timeout values remain > instead (it looks like they were exactly like these in above override at > that time). > > Did Atmel 3204 report wrong but non-zero timeouts? Wouldn't it make more sense to fix this by re-adding this fallback? /Jarkko ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi
On 12.01.2017 21:20, Jarkko Sakkinen wrote: > On Thu, Jan 12, 2017 at 09:09:33PM +0100, Maciej S. Szmigiero wrote: >> Hi Jason, >> >> On 12.01.2017 19:42, Jason Gunthorpe wrote: (..) >>> Can you also add a check for 0 timeouts in the core code and print a >>> FW_BUG :\ >> >> Hmm, I dug in history of tpm-interface.c and the code had actually rejected >> zero timeouts until commit 8e54caf407b98e (this is the commit that >> introduced the Atmel 3204 workaround) and let default timeout values remain >> instead (it looks like they were exactly like these in above override at >> that time). >> >> Did Atmel 3204 report wrong but non-zero timeouts? > > Wouldn't it make more sense to fix this by re-adding this fallback? I think it would be a cleaner fix and also catch other problematic devices (if there are any) without needing to add individual overrides. > /Jarkko Maciej ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi
On Thu, Jan 12, 2017 at 10:37:31PM +0100, Maciej S. Szmigiero wrote: > On 12.01.2017 21:20, Jarkko Sakkinen wrote: > > On Thu, Jan 12, 2017 at 09:09:33PM +0100, Maciej S. Szmigiero wrote: > >> Hi Jason, > >> > >> On 12.01.2017 19:42, Jason Gunthorpe wrote: > (..) > >>> Can you also add a check for 0 timeouts in the core code and print a > >>> FW_BUG :\ > >> > >> Hmm, I dug in history of tpm-interface.c and the code had actually rejected > >> zero timeouts until commit 8e54caf407b98e (this is the commit that > >> introduced the Atmel 3204 workaround) and let default timeout values remain > >> instead (it looks like they were exactly like these in above override at > >> that time). > >> > >> Did Atmel 3204 report wrong but non-zero timeouts? > > > > Wouldn't it make more sense to fix this by re-adding this fallback? > > I think it would be a cleaner fix and also catch other problematic > devices (if there are any) without needing to add individual overrides. Please go with that but add also FW_BUG print just to be aware of chips that report zero values. /Jarkko ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi
diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c index 7993678954a2..e42e5a6a3c2f 100644 --- a/drivers/char/tpm/tpm_tis_core.c +++ b/drivers/char/tpm/tpm_tis_core.c @@ -421,6 +421,9 @@ struct tis_vendor_timeout_override { }; static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { + /* Atmel 3203 */ + { 0x32031114, { (10*1000), (10*1000), + (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, /* Atmel 3204 */ { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
Since commit 1107d065fdf1 ("tpm_tis: Introduce intermediate layer for TPM access") Atmel 3203 TPM on ThinkPad X61S (TPM firmware version 13.9) no longer works. It turns out the initialization proceeds fine until we get and start using chip-reported timeouts - and the chip reports C and D timeouts of zero. Since these are clearly not long enough let's add an override for them to TPM TIS default values, just as we do for Atmel 3204. A and B timeouts are set to the same values as the chip normally reports. Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> Fixes: 1107d065fdf1 ("tpm_tis: Introduce intermediate layer for TPM access") Cc: stable@vger.kernel.org --- drivers/char/tpm/tpm_tis_core.c | 3 +++ 1 file changed, 3 insertions(+) ------------------------------------------------------------------------------ Developer Access Program for Intel Xeon Phi Processors Access to Intel Xeon Phi processor-based developer platforms. With one year of Intel Parallel Studio XE. Training and support from Colfax. Order your platform today. http://sdm.link/xeonphi