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[4/5] pxa2xx: fix SSSR TFN logic

Message ID AANLkTi=VoVFA0Y5urGsoqBxNM4fZxDAr6nFqzCpy_s-z@mail.gmail.com
State New
Headers show

Commit Message

Blue Swirl Sept. 4, 2010, 2:17 p.m. UTC
Fix SSSR TFN logic: TX FIFO is never filled, so it is always in
underrun condition if SSP is enabled.

This also fixes a gcc warning with -Wtype-limits.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---
 hw/pxa2xx.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

Comments

andrzej zaborowski Sept. 4, 2010, 3:30 p.m. UTC | #1
Hi,

On 4 September 2010 16:17, Blue Swirl <blauwirbel@gmail.com> wrote:
> Fix SSSR TFN logic: TX FIFO is never filled, so it is always in
> underrun condition if SSP is enabled.

As far as I see this doesn't make any change when the port is enabled?
 How does it fix the logic then?

Cheers
Blue Swirl Sept. 4, 2010, 3:53 p.m. UTC | #2
On Sat, Sep 4, 2010 at 3:30 PM, andrzej zaborowski <balrogg@gmail.com> wrote:
> Hi,
>
> On 4 September 2010 16:17, Blue Swirl <blauwirbel@gmail.com> wrote:
>> Fix SSSR TFN logic: TX FIFO is never filled, so it is always in
>> underrun condition if SSP is enabled.
>
> As far as I see this doesn't make any change when the port is enabled?
>  How does it fix the logic then?

Before, TFS flag was never cleared, so if the port was enabled and
then disabled the flag remained set. According to my reading of the
manual, this shouldn't be the case. As you noticed, the logic does not
change for the case where the port is enabled.

The previous check was always true. If you prefer, the patch could be
simplified to something like this:
-        if (0 <= SSCR1_TFT(s->sscr[1]))
-            s->sssr |= SSSR_TFS;
-        else
-            s->sssr &= ~SSSR_TFS;
+        /* TX FIFO is never filled, so it is always in underrun
+           condition if SSP is enabled */
+        s->sssr |= SSSR_TFS;
diff mbox

Patch

diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index 3c06bf9..ec7fd68 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -636,6 +636,7 @@  static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
 {
     s->sssr &= ~(0xf << 12);	/* Clear RFL */
     s->sssr &= ~(0xf << 8);	/* Clear TFL */
+    s->sssr &= ~SSSR_TFS;
     s->sssr &= ~SSSR_TNF;
     if (s->enable) {
         s->sssr |= ((s->rx_level - 1) & 0xf) << 12;
@@ -643,14 +644,13 @@  static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
             s->sssr |= SSSR_RFS;
         else
             s->sssr &= ~SSSR_RFS;
-        if (0 <= SSCR1_TFT(s->sscr[1]))
-            s->sssr |= SSSR_TFS;
-        else
-            s->sssr &= ~SSSR_TFS;
         if (s->rx_level)
             s->sssr |= SSSR_RNE;
         else
             s->sssr &= ~SSSR_RNE;
+        /* TX FIFO is never filled, so it is always in underrun
+           condition if SSP is enabled */
+        s->sssr |= SSSR_TFS;
         s->sssr |= SSSR_TNF;
     }