Message ID | 1473130206-31498-1-git-send-email-oohall@gmail.com |
---|---|
State | Superseded |
Headers | show |
On Tue, Sep 6, 2016 at 12:50 PM, Oliver O'Halloran <oohall@gmail.com> wrote: > master_cpu is used to determine the ChipTOD master if no ChipTOD > information is available in the HDAT. However, it is set to zero at every > skiboot entry point (fdt_entry, the 0x180 FSP entry and > opal_boot_trampoline) and is otherwise unused. This patch removes this > passing around and uses the boot CPU PIR to find the ChipTOD master rather > than zero. > > Signed-off-by: Oliver O'Halloran <oohall@gmail.com> > --- > asm/head.S | 5 ----- > core/init.c | 8 ++++---- > hdata/spira.c | 15 ++++++--------- > include/skiboot.h | 2 +- > 4 files changed, 11 insertions(+), 19 deletions(-) > > diff --git a/asm/head.S b/asm/head.S > index 60bdbe8bba86..a4105ca4812b 100644 > --- a/asm/head.S > +++ b/asm/head.S > @@ -57,7 +57,6 @@ __head: > .global fdt_entry > fdt_entry: > mr %r27,%r3 > - li %r25,0 > b boot_entry > > /* This is a pointer to a descriptor used by debugging tools > @@ -109,7 +108,6 @@ hir_trigger: > /* Entry point set by the FSP */ > .= 0x180 > li %r27,0 > - li %r25,0 > b boot_entry > > #define EXCEPTION(nr) \ > @@ -249,7 +247,6 @@ boot_offset: > * r28 : PVR > * r27 : DTB pointer (or NULL) > * r26 : PIR thread mask > - * r25 : Selected master CPU (OPAL boot) > */ > .global boot_entry > boot_entry: > @@ -390,7 +387,6 @@ boot_entry: > #endif > /* Jump to C */ > mr %r3,%r27 > - mr %r4,%r25 > bl main_cpu_entry > b . > > @@ -819,7 +815,6 @@ opal_naca: > * got to the same entry we use for pHyp and FDT HB. > */ > opal_boot_trampoline: > - li %r25,0 > li %r27,-1 > ba boot_entry - __head > > diff --git a/core/init.c b/core/init.c > index 821094fed1c1..4e2f2e56a60b 100644 > --- a/core/init.c > +++ b/core/init.c > @@ -620,9 +620,9 @@ static void copy_exception_vectors(void) > sync_icache(); > } > /* Called from head.S, thus no prototype. */ > -void main_cpu_entry(const void *fdt, u32 master_cpu); > +void __noreturn main_cpu_entry(const void *fdt); > > -void __noreturn __nomcount main_cpu_entry(const void *fdt, u32 master_cpu) > +void __noreturn main_cpu_entry(const void *fdt) This shouldn't strip __nomcount. I'll post a respin later. > { > /* > * WARNING: At this point. the timebases have > @@ -683,10 +683,10 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt, u32 master_cpu) > * is set to -1, we record that and pass it to parse_hdat > */ > if (fdt == (void *)-1ul) { > - if (parse_hdat(true, master_cpu) < 0) > + if (parse_hdat(true) < 0) > abort(); > } else if (fdt == NULL) { > - if (parse_hdat(false, master_cpu) < 0) > + if (parse_hdat(false) < 0) > abort(); > } else { > dt_expand(fdt); > diff --git a/hdata/spira.c b/hdata/spira.c > index e4e6b2d5830c..330108b1e577 100644 > --- a/hdata/spira.c > +++ b/hdata/spira.c > @@ -624,10 +624,10 @@ static bool add_chiptod_old(void) > return found; > } > > -static bool add_chiptod_new(uint32_t master_cpu) > +static bool add_chiptod_new(void) > { > const void *hdif; > - unsigned int i, master_chip; > + unsigned int i; > bool found = false; > > /* > @@ -636,8 +636,6 @@ static bool add_chiptod_new(uint32_t master_cpu) > if (!get_hdif(&spira.ntuples.proc_chip, SPPCRD_HDIF_SIG)) > return found; > > - master_chip = pir_to_chip_id(master_cpu); > - > for_each_ntuple_idx(&spira.ntuples.proc_chip, hdif, i, > SPPCRD_HDIF_SIG) { > const struct sppcrd_chip_info *cinfo; > @@ -668,12 +666,11 @@ static bool add_chiptod_new(uint32_t master_cpu) > /* The FSP may strip the chiptod info from HDAT; if we find > * a zero-ed out entry, assume that the chiptod is > * present, but we don't have any primary/secondary info. In > - * this case, pick the primary based on the CPU that was > - * assigned master. > + * this case, pick chip zero as the master. > */ > if (!size) { > flags = CHIPTOD_ID_FLAGS_STATUS_OK; > - if (be32_to_cpu(cinfo->xscom_id) == master_chip) > + if (be32_to_cpu(cinfo->xscom_id) == 0x0) > flags |= CHIPTOD_ID_FLAGS_PRIMARY; > } > > @@ -1092,7 +1089,7 @@ static void fixup_spira(void) > spira.ntuples.hs_data = spiras->ntuples.hs_data; > } > > -int parse_hdat(bool is_opal, uint32_t master_cpu) > +int parse_hdat(bool is_opal) > { > cpu_type = PVR_TYPE(mfspr(SPR_PVR)); > > @@ -1133,7 +1130,7 @@ int parse_hdat(bool is_opal, uint32_t master_cpu) > fsp_parse(); > > /* Add ChipTOD's */ > - if (!add_chiptod_old() && !add_chiptod_new(master_cpu)) > + if (!add_chiptod_old() && !add_chiptod_new()) > prerror("CHIPTOD: No ChipTOD found !\n"); > > /* Add NX */ > diff --git a/include/skiboot.h b/include/skiboot.h > index 4ccf46d9e565..52a235b57beb 100644 > --- a/include/skiboot.h > +++ b/include/skiboot.h > @@ -175,7 +175,7 @@ extern void start_kernel32(uint64_t entry, void* fdt, > extern void start_kernel_secondary(uint64_t entry) __noreturn; > > /* Get description of machine from HDAT and create device-tree */ > -extern int parse_hdat(bool is_opal, uint32_t master_cpu); > +extern int parse_hdat(bool is_opal); > > /* Root of device tree. */ > extern struct dt_node *dt_root; > -- > 2.5.5 >
diff --git a/asm/head.S b/asm/head.S index 60bdbe8bba86..a4105ca4812b 100644 --- a/asm/head.S +++ b/asm/head.S @@ -57,7 +57,6 @@ __head: .global fdt_entry fdt_entry: mr %r27,%r3 - li %r25,0 b boot_entry /* This is a pointer to a descriptor used by debugging tools @@ -109,7 +108,6 @@ hir_trigger: /* Entry point set by the FSP */ .= 0x180 li %r27,0 - li %r25,0 b boot_entry #define EXCEPTION(nr) \ @@ -249,7 +247,6 @@ boot_offset: * r28 : PVR * r27 : DTB pointer (or NULL) * r26 : PIR thread mask - * r25 : Selected master CPU (OPAL boot) */ .global boot_entry boot_entry: @@ -390,7 +387,6 @@ boot_entry: #endif /* Jump to C */ mr %r3,%r27 - mr %r4,%r25 bl main_cpu_entry b . @@ -819,7 +815,6 @@ opal_naca: * got to the same entry we use for pHyp and FDT HB. */ opal_boot_trampoline: - li %r25,0 li %r27,-1 ba boot_entry - __head diff --git a/core/init.c b/core/init.c index 821094fed1c1..4e2f2e56a60b 100644 --- a/core/init.c +++ b/core/init.c @@ -620,9 +620,9 @@ static void copy_exception_vectors(void) sync_icache(); } /* Called from head.S, thus no prototype. */ -void main_cpu_entry(const void *fdt, u32 master_cpu); +void __noreturn main_cpu_entry(const void *fdt); -void __noreturn __nomcount main_cpu_entry(const void *fdt, u32 master_cpu) +void __noreturn main_cpu_entry(const void *fdt) { /* * WARNING: At this point. the timebases have @@ -683,10 +683,10 @@ void __noreturn __nomcount main_cpu_entry(const void *fdt, u32 master_cpu) * is set to -1, we record that and pass it to parse_hdat */ if (fdt == (void *)-1ul) { - if (parse_hdat(true, master_cpu) < 0) + if (parse_hdat(true) < 0) abort(); } else if (fdt == NULL) { - if (parse_hdat(false, master_cpu) < 0) + if (parse_hdat(false) < 0) abort(); } else { dt_expand(fdt); diff --git a/hdata/spira.c b/hdata/spira.c index e4e6b2d5830c..330108b1e577 100644 --- a/hdata/spira.c +++ b/hdata/spira.c @@ -624,10 +624,10 @@ static bool add_chiptod_old(void) return found; } -static bool add_chiptod_new(uint32_t master_cpu) +static bool add_chiptod_new(void) { const void *hdif; - unsigned int i, master_chip; + unsigned int i; bool found = false; /* @@ -636,8 +636,6 @@ static bool add_chiptod_new(uint32_t master_cpu) if (!get_hdif(&spira.ntuples.proc_chip, SPPCRD_HDIF_SIG)) return found; - master_chip = pir_to_chip_id(master_cpu); - for_each_ntuple_idx(&spira.ntuples.proc_chip, hdif, i, SPPCRD_HDIF_SIG) { const struct sppcrd_chip_info *cinfo; @@ -668,12 +666,11 @@ static bool add_chiptod_new(uint32_t master_cpu) /* The FSP may strip the chiptod info from HDAT; if we find * a zero-ed out entry, assume that the chiptod is * present, but we don't have any primary/secondary info. In - * this case, pick the primary based on the CPU that was - * assigned master. + * this case, pick chip zero as the master. */ if (!size) { flags = CHIPTOD_ID_FLAGS_STATUS_OK; - if (be32_to_cpu(cinfo->xscom_id) == master_chip) + if (be32_to_cpu(cinfo->xscom_id) == 0x0) flags |= CHIPTOD_ID_FLAGS_PRIMARY; } @@ -1092,7 +1089,7 @@ static void fixup_spira(void) spira.ntuples.hs_data = spiras->ntuples.hs_data; } -int parse_hdat(bool is_opal, uint32_t master_cpu) +int parse_hdat(bool is_opal) { cpu_type = PVR_TYPE(mfspr(SPR_PVR)); @@ -1133,7 +1130,7 @@ int parse_hdat(bool is_opal, uint32_t master_cpu) fsp_parse(); /* Add ChipTOD's */ - if (!add_chiptod_old() && !add_chiptod_new(master_cpu)) + if (!add_chiptod_old() && !add_chiptod_new()) prerror("CHIPTOD: No ChipTOD found !\n"); /* Add NX */ diff --git a/include/skiboot.h b/include/skiboot.h index 4ccf46d9e565..52a235b57beb 100644 --- a/include/skiboot.h +++ b/include/skiboot.h @@ -175,7 +175,7 @@ extern void start_kernel32(uint64_t entry, void* fdt, extern void start_kernel_secondary(uint64_t entry) __noreturn; /* Get description of machine from HDAT and create device-tree */ -extern int parse_hdat(bool is_opal, uint32_t master_cpu); +extern int parse_hdat(bool is_opal); /* Root of device tree. */ extern struct dt_node *dt_root;
master_cpu is used to determine the ChipTOD master if no ChipTOD information is available in the HDAT. However, it is set to zero at every skiboot entry point (fdt_entry, the 0x180 FSP entry and opal_boot_trampoline) and is otherwise unused. This patch removes this passing around and uses the boot CPU PIR to find the ChipTOD master rather than zero. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> --- asm/head.S | 5 ----- core/init.c | 8 ++++---- hdata/spira.c | 15 ++++++--------- include/skiboot.h | 2 +- 4 files changed, 11 insertions(+), 19 deletions(-)