| Message ID | 1278033333.3681.11.camel@otta |
|---|---|
| State | New |
| Headers | show |
On Thu, Jul 01, 2010 at 08:15:33PM -0500, Peter Bergner wrote: > After fixing that, I noticed the fixed code caused a couple of new testsuite > failures that I tracked down to us now setting MASK_PPC_GFXOPT in the > target_flags whenever TARGET_ALTIVEC is enabled. I think that is wrong. A 7400 or 7450 (G4) processor has altivec but not the newer form of mfcr, at least if I can read the data sheets correctly. I think they also use the older y bit for branch hints. > This causes us to start > generating the two operand form of the mfcr instruction which gas only > accepts with -mpower4 or later. I fixed that by passing -mpower4 to gas > whenever we use gcc's -maltivec option, unless we've explicitly passed > -mcpu=XXX. So that would also make this wrong..
On Fri, 2010-07-02 at 12:55 +0930, Alan Modra wrote: > On Thu, Jul 01, 2010 at 08:15:33PM -0500, Peter Bergner wrote: > > After fixing that, I noticed the fixed code caused a couple of new testsuite > > failures that I tracked down to us now setting MASK_PPC_GFXOPT in the > > target_flags whenever TARGET_ALTIVEC is enabled. > > I think that is wrong. A 7400 or 7450 (G4) processor has altivec but > not the newer form of mfcr, at least if I can read the data sheets > correctly. I think they also use the older y bit for branch hints. I had wondered to myself whether we wanted to add that mask, but after looking that the 7400 and 7450 already have the MASK_PPC_GFXOPT set for -mcpu={7400,7450}, I guess I convinced myself that it was right. I guess I need to track down how that two operand form mfcr is being generated. Thanks. Peter
Index: config/rs6000/rs6000.c =================================================================== --- config/rs6000/rs6000.c (revision 161490) +++ config/rs6000/rs6000.c (working copy) @@ -2656,11 +2656,11 @@ rs6000_override_options (const char *def /* For the newer switches (vsx, dfp, etc.) set some of the older options, unless the user explicitly used the -mno-<option> to disable the code. */ if (TARGET_VSX) - target_flags |= (ISA_2_6_MASKS & (target_flags_explicit & ~ISA_2_6_MASKS)); + target_flags |= (ISA_2_6_MASKS & ~target_flags_explicit); else if (TARGET_DFP) - target_flags |= (ISA_2_5_MASKS & (target_flags_explicit & ~ISA_2_5_MASKS)); + target_flags |= (ISA_2_5_MASKS & ~target_flags_explicit); else if (TARGET_ALTIVEC) - target_flags |= (MASK_PPC_GFXOPT & (target_flags_explicit & ~MASK_PPC_GFXOPT)); + target_flags |= (MASK_PPC_GFXOPT & ~target_flags_explicit); /* Set debug flags */ if (rs6000_debug_name) Index: config/rs6000/rs6000.h =================================================================== --- config/rs6000/rs6000.h (revision 161490) +++ config/rs6000/rs6000.h (working copy) @@ -159,7 +159,8 @@ %{mcpu=e300c3: -me300} \ %{mcpu=e500mc: -me500mc} \ %{mcpu=e500mc64: -me500mc64} \ -%{maltivec: -maltivec} \ +%{maltivec: -maltivec %{!mcpu*: %{!mvsx: -mpower4}}} \ +%{mvsx: -mvsx %{!maltivec: -maltivec} %{!mcpu*: %(asm_cpu_power7)}} \ -many" #define CPP_DEFAULT_SPEC ""
While looking through the powerpc64-linux testsuite failures, I noticed that Mike's reciprocal estimate patches caused the vsx-vector-{5,6}.c test cases to fail because of a typo in rs6000_override_options. After fixing that, I noticed the fixed code caused a couple of new testsuite failures that I tracked down to us now setting MASK_PPC_GFXOPT in the target_flags whenever TARGET_ALTIVEC is enabled. This causes us to start generating the two operand form of the mfcr instruction which gas only accepts with -mpower4 or later. I fixed that by passing -mpower4 to gas whenever we use gcc's -maltivec option, unless we've explicitly passed -mcpu=XXX. I also added similar support for -mvsx. Bootstrapped and regtested on powerpc64-linux with no new regressions and vsx-vector-{5,6}.c test cases now passing. Ok for mainline once the slush is over? Peter * config/rs6000/rs6000.c (rs6000_override_options): Fix setting of default ISA flags. * config/rs6000/rs6000.h (ASM_CPU_SPEC) <-maltivec>: Pass -mpower4 by default. <-mvsx>: Add.