Message ID | 1457525396-27240-1-git-send-email-lokeshvutla@ti.com |
---|---|
State | Accepted |
Commit | 3eb80d10c7715d427808908b259646f1df781264 |
Delegated to: | Tom Rini |
Headers | show |
On Wed, Mar 09, 2016 at 05:39:56PM +0530, Lokesh Vutla wrote: > From: Nishanth Menon <nm@ti.com> > > If EMIF is idle for certain amount of DDR cycles, EMIF will put the > DDR in self refresh mode to save power if EMIF_PWR_MGMT_CTRL register > is programmed. And also before entering suspend-resume ddr needs to > be put in self-refresh. Linux kernel does not program this register > before entering suspend and relies on u-boot setting. > So configuring it in u-boot. > > Signed-off-by: Nishanth Menon <nm@ti.com> > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
On Wed, Mar 09, 2016 at 05:39:56PM +0530, Lokesh Vutla wrote: > From: Nishanth Menon <nm@ti.com> > > If EMIF is idle for certain amount of DDR cycles, EMIF will put the > DDR in self refresh mode to save power if EMIF_PWR_MGMT_CTRL register > is programmed. And also before entering suspend-resume ddr needs to > be put in self-refresh. Linux kernel does not program this register > before entering suspend and relies on u-boot setting. > So configuring it in u-boot. > > Signed-off-by: Nishanth Menon <nm@ti.com> > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> > Tested-by: Tom Rini <trini@konsulko.com> > Reviewed-by: Tom Rini <trini@konsulko.com> Applied to u-boot/master, thanks!
diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index 3183130..b00dece 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -914,8 +914,8 @@ struct dmm_lisa_map_regs { /* Maximum delay before Low Power Modes */ #define REG_CS_TIM 0x0 -#define REG_SR_TIM 0x0 -#define REG_PD_TIM 0x0 +#define REG_SR_TIM 0xF +#define REG_PD_TIM 0xF /* EMIF_PWR_MGMT_CTRL register */ @@ -923,7 +923,7 @@ struct dmm_lisa_map_regs { ((REG_CS_TIM << EMIF_REG_CS_TIM_SHIFT) & EMIF_REG_CS_TIM_MASK)|\ ((REG_SR_TIM << EMIF_REG_SR_TIM_SHIFT) & EMIF_REG_SR_TIM_MASK)|\ ((REG_PD_TIM << EMIF_REG_PD_TIM_SHIFT) & EMIF_REG_PD_TIM_MASK)|\ - ((LP_MODE_DISABLE << EMIF_REG_LP_MODE_SHIFT)\ + ((LP_MODE_SELF_REFRESH << EMIF_REG_LP_MODE_SHIFT)\ & EMIF_REG_LP_MODE_MASK) |\ ((DPD_DISABLE << EMIF_REG_DPD_EN_SHIFT)\ & EMIF_REG_DPD_EN_MASK))\