diff mbox

[U-Boot] mx6slevk: Fix the power up of the Ethernet PHY

Message ID 1457704222-23965-1-git-send-email-festevam@gmail.com
State Accepted
Commit ae765f3a8243faa39d4a32ba2baede638e40c768
Delegated to: Tom Rini
Headers show

Commit Message

Fabio Estevam March 11, 2016, 1:50 p.m. UTC 
From: Fabio Estevam <fabio.estevam@nxp.com>

GPIO4_21 is the LAN8720 power pin, not the LAN8720 reset pin.

Fix that, so that we can have Ethernet functional again.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
 board/freescale/mx6slevk/mx6slevk.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

Comments

Tom Rini March 13, 2016, 1:45 p.m. UTC | #1 
On Fri, Mar 11, 2016 at 10:50:22AM -0300, Fabio Estevam wrote:

> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> GPIO4_21 is the LAN8720 power pin, not the LAN8720 reset pin.
> 
> Fix that, so that we can have Ethernet functional again.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>

Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini March 13, 2016, 1:50 p.m. UTC | #2 
On Fri, Mar 11, 2016 at 10:50:22AM -0300, Fabio Estevam wrote:

> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> GPIO4_21 is the LAN8720 power pin, not the LAN8720 reset pin.
> 
> Fix that, so that we can have Ethernet functional again.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>

Applied to u-boot/master, thanks!
diff mbox

Patch

diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index 4f816c4..f440ce6 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -57,7 +57,7 @@  DECLARE_GLOBAL_DATA_PTR;
 			PAD_CTL_DSE_80ohm | PAD_CTL_HYS |	\
 			PAD_CTL_SRE_FAST)
 
-#define ETH_PHY_RESET	IMX_GPIO_NR(4, 21)
+#define ETH_PHY_POWER	IMX_GPIO_NR(4, 21)
 
 int dram_init(void)
 {
@@ -154,10 +154,9 @@  static void setup_iomux_fec(void)
 {
 	imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
 
-	/* Reset LAN8720 PHY */
-	gpio_direction_output(ETH_PHY_RESET , 0);
-	udelay(25000);
-	gpio_set_value(ETH_PHY_RESET, 1);
+	/* Power up LAN8720 PHY */
+	gpio_direction_output(ETH_PHY_POWER , 1);
+	udelay(15000);
 }
 
 #define USDHC1_CD_GPIO	IMX_GPIO_NR(4, 7)