| Message ID | 1447940895-7763-10-git-send-email-thomas@wytron.com.tw |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show |
On 19 November 2015 at 06:48, Thomas Chou <thomas@wytron.com.tw> wrote: > Unify serial_tegra, and use the generic binding. > > Signed-off-by: Thomas Chou <thomas@wytron.com.tw> > Reviewed-by: Tom Rini <trini@konsulko.com> > --- > arch/arm/mach-tegra/board.c | 14 +++++++++++ > drivers/serial/Makefile | 1 - > drivers/serial/serial_tegra.c | 54 ------------------------------------------ > include/configs/tegra-common.h | 3 ++- > 4 files changed, 16 insertions(+), 56 deletions(-) > delete mode 100644 drivers/serial/serial_tegra.c Acked-by: Simon Glass <sjg@chromium.org>
On Thu, Nov 19, 2015 at 09:48:11PM +0800, Thomas Chou wrote: > Unify serial_tegra, and use the generic binding. > > Signed-off-by: Thomas Chou <thomas@wytron.com.tw> > Reviewed-by: Tom Rini <trini@konsulko.com> > Acked-by: Simon Glass <sjg@chromium.org> Applied to u-boot/master, thanks!
On 11/22/2015 08:53 AM, Tom Rini wrote: > On Thu, Nov 19, 2015 at 09:48:11PM +0800, Thomas Chou wrote: > >> Unify serial_tegra, and use the generic binding. >> >> Signed-off-by: Thomas Chou <thomas@wytron.com.tw> >> Reviewed-by: Tom Rini <trini@konsulko.com> >> Acked-by: Simon Glass <sjg@chromium.org> > > Applied to u-boot/master, thanks! FYI, this patch causes at least Jetson TK1 to immediately reset at boot time. I imagine this affects all Tegra boards, at least those that use SPL or those that are ARMv7; my p2371-2180 Jetson TX1 ARMv8 board which doesn't use SPL seems to still work. I guess I'll see if I can pin-point the problem, unless you can spot an obvious typo or something like that. Reported-by: Kevin Hilman <khilman@linaro.org> (Bisected by me)
Hi Stephen, On 3 December 2015 at 14:33, Stephen Warren <swarren@wwwdotorg.org> wrote: > On 11/22/2015 08:53 AM, Tom Rini wrote: >> >> On Thu, Nov 19, 2015 at 09:48:11PM +0800, Thomas Chou wrote: >> >>> Unify serial_tegra, and use the generic binding. >>> >>> Signed-off-by: Thomas Chou <thomas@wytron.com.tw> >>> Reviewed-by: Tom Rini <trini@konsulko.com> >>> Acked-by: Simon Glass <sjg@chromium.org> >> >> >> Applied to u-boot/master, thanks! > > > FYI, this patch causes at least Jetson TK1 to immediately reset at boot > time. I imagine this affects all Tegra boards, at least those that use SPL > or those that are ARMv7; my p2371-2180 Jetson TX1 ARMv8 board which doesn't > use SPL seems to still work. > > I guess I'll see if I can pin-point the problem, unless you can spot an > obvious typo or something like that. > > Reported-by: Kevin Hilman <khilman@linaro.org> > (Bisected by me) Unfortunately I didn't test this patch. Things to check: - for SPL, that the platform data is available somewhere - clock-frequency and reg-shift are in the device tree Regards, Simon
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index b00e4b5..8c8927d 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -6,6 +6,8 @@ */ #include <common.h> +#include <dm.h> +#include <ns16550.h> #include <spl.h> #include <asm/io.h> #include <asm/arch/clock.h> @@ -212,6 +214,18 @@ void board_init_uart_f(void) setup_uarts(uart_ids); } +#if CONFIG_IS_ENABLED(DM_SERIAL) && !CONFIG_IS_ENABLED(OF_CONTROL) +static struct ns16550_platdata ns16550_com1_pdata = { + .base = CONFIG_SYS_NS16550_COM1, + .reg_shift = 2, + .clock = CONFIG_SYS_NS16550_CLK, +}; + +U_BOOT_DEVICE(ns16550_com1) = { + "ns16550_serial", &ns16550_com1_pdata +}; +#endif + #if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) void enable_caches(void) { diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 2a83756..86ae50f 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -39,7 +39,6 @@ obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o obj-$(CONFIG_MXS_AUART) += mxs_auart.o obj-$(CONFIG_ARC_SERIAL) += serial_arc.o -obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o diff --git a/drivers/serial/serial_tegra.c b/drivers/serial/serial_tegra.c deleted file mode 100644 index 0c84f0b..0000000 --- a/drivers/serial/serial_tegra.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2014 Google, Inc - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <dm.h> -#include <ns16550.h> -#include <serial.h> - -#if CONFIG_IS_ENABLED(OF_CONTROL) -static const struct udevice_id tegra_serial_ids[] = { - { .compatible = "nvidia,tegra20-uart" }, - { } -}; - -static int tegra_serial_ofdata_to_platdata(struct udevice *dev) -{ - struct ns16550_platdata *plat = dev_get_platdata(dev); - int ret; - - ret = ns16550_serial_ofdata_to_platdata(dev); - if (ret) - return ret; - plat->clock = V_NS16550_CLK; - - return 0; -} -#else -struct ns16550_platdata tegra_serial = { - .base = CONFIG_SYS_NS16550_COM1, - .reg_shift = 2, - .clock = V_NS16550_CLK, -}; - -U_BOOT_DEVICE(ns16550_serial) = { - "serial_tegra20", &tegra_serial -}; -#endif - -U_BOOT_DRIVER(serial_ns16550) = { - .name = "serial_tegra20", - .id = UCLASS_SERIAL, -#if CONFIG_IS_ENABLED(OF_CONTROL) - .of_match = tegra_serial_ids, - .ofdata_to_platdata = tegra_serial_ofdata_to_platdata, - .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), -#endif - .priv_auto_alloc_size = sizeof(struct NS16550), - .probe = ns16550_serial_probe, - .ops = &ns16550_serial_ops, - .flags = DM_FLAG_PRE_RELOC, -}; diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 5bb9e48..bcc35f7 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -39,8 +39,9 @@ /* * NS16550 Configuration */ -#define CONFIG_TEGRA_SERIAL +#define CONFIG_NS16550_SERIAL #define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* * Common HW configuration.