Message ID | 1443829446-4008-1-git-send-email-swarren@wwwdotorg.org |
---|---|
State | Accepted |
Delegated to: | Simon Glass |
Headers | show |
On 3 October 2015 at 00:44, Stephen Warren <swarren@wwwdotorg.org> wrote: > From: Stephen Warren <swarren@nvidia.com> > > PCI addresses are always represented as 3 cells in DT. (one cell for bus > and device, and two cells for a 64-bit addres). This does not vary based > on either the physical address size of the CPU, nor any #address-cells > property in DT (or more precisely, #address-cells must be set to 3 in any > PCIe controller's node). > > Fix fdtdec_get_pci_addr() to use conversion functions that operate on > (fixed) cell-sized data rather than (varying) physical-address-sized > data, so that the function works on 64-bit systems. > > Signed-off-by: Stephen Warren <swarren@nvidia.com> > --- > lib/fdtdec.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) Acked-by: Simon Glass <sjg@chromium.org>
On Fri, Oct 02, 2015 at 05:44:06PM -0600, Stephen Warren wrote: > From: Stephen Warren <swarren@nvidia.com> > > PCI addresses are always represented as 3 cells in DT. (one cell for bus > and device, and two cells for a 64-bit addres). This does not vary based > on either the physical address size of the CPU, nor any #address-cells > property in DT (or more precisely, #address-cells must be set to 3 in any > PCIe controller's node). > > Fix fdtdec_get_pci_addr() to use conversion functions that operate on > (fixed) cell-sized data rather than (varying) physical-address-sized > data, so that the function works on 64-bit systems. > > Signed-off-by: Stephen Warren <swarren@nvidia.com> > --- > lib/fdtdec.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) This looks very familiar. I think I used to have an equivalent patch in my tree, but possibly never sent it out because I never managed to get PCIe to work. Anyway: Reviewed-by: Thierry Reding <treding@nvidia.com>
On 10/03/2015 08:30 AM, Simon Glass wrote: > On 3 October 2015 at 00:44, Stephen Warren <swarren@wwwdotorg.org> wrote: >> From: Stephen Warren <swarren@nvidia.com> >> >> PCI addresses are always represented as 3 cells in DT. (one cell for bus >> and device, and two cells for a 64-bit addres). This does not vary based >> on either the physical address size of the CPU, nor any #address-cells >> property in DT (or more precisely, #address-cells must be set to 3 in any >> PCIe controller's node). >> >> Fix fdtdec_get_pci_addr() to use conversion functions that operate on >> (fixed) cell-sized data rather than (varying) physical-address-sized >> data, so that the function works on 64-bit systems. >> >> Signed-off-by: Stephen Warren <swarren@nvidia.com> >> --- >> lib/fdtdec.c | 14 +++++++------- >> 1 file changed, 7 insertions(+), 7 deletions(-) > > Acked-by: Simon Glass <sjg@chromium.org> Simon, this patch appears to be assigned to you in patchwork. Will you apply it now the merge window is open, or are you assuming it will go through the Tegra tree with all the PCIe patches?
Hi Stephen, On 21 October 2015 at 10:31, Stephen Warren <swarren@wwwdotorg.org> wrote: > > On 10/03/2015 08:30 AM, Simon Glass wrote: >> >> On 3 October 2015 at 00:44, Stephen Warren <swarren@wwwdotorg.org> wrote: >>> >>> From: Stephen Warren <swarren@nvidia.com> >>> >>> PCI addresses are always represented as 3 cells in DT. (one cell for bus >>> and device, and two cells for a 64-bit addres). This does not vary based >>> on either the physical address size of the CPU, nor any #address-cells >>> property in DT (or more precisely, #address-cells must be set to 3 in any >>> PCIe controller's node). >>> >>> Fix fdtdec_get_pci_addr() to use conversion functions that operate on >>> (fixed) cell-sized data rather than (varying) physical-address-sized >>> data, so that the function works on 64-bit systems. >>> >>> Signed-off-by: Stephen Warren <swarren@nvidia.com> >>> --- >>> lib/fdtdec.c | 14 +++++++------- >>> 1 file changed, 7 insertions(+), 7 deletions(-) >> >> >> Acked-by: Simon Glass <sjg@chromium.org> > > > Simon, this patch appears to be assigned to you in patchwork. Will you apply it now the merge window is open, or are you assuming it will go through the Tegra tree with all the PCIe patches? > I can pick it up. Regards, Simon
On 21 October 2015 at 14:42, Simon Glass <sjg@chromium.org> wrote: > > Hi Stephen, > > On 21 October 2015 at 10:31, Stephen Warren <swarren@wwwdotorg.org> wrote: > > > > On 10/03/2015 08:30 AM, Simon Glass wrote: > >> > >> On 3 October 2015 at 00:44, Stephen Warren <swarren@wwwdotorg.org> wrote: > >>> > >>> From: Stephen Warren <swarren@nvidia.com> > >>> > >>> PCI addresses are always represented as 3 cells in DT. (one cell for bus > >>> and device, and two cells for a 64-bit addres). This does not vary based > >>> on either the physical address size of the CPU, nor any #address-cells > >>> property in DT (or more precisely, #address-cells must be set to 3 in any > >>> PCIe controller's node). > >>> > >>> Fix fdtdec_get_pci_addr() to use conversion functions that operate on > >>> (fixed) cell-sized data rather than (varying) physical-address-sized > >>> data, so that the function works on 64-bit systems. > >>> > >>> Signed-off-by: Stephen Warren <swarren@nvidia.com> > >>> --- > >>> lib/fdtdec.c | 14 +++++++------- > >>> 1 file changed, 7 insertions(+), 7 deletions(-) > >> > >> > >> Acked-by: Simon Glass <sjg@chromium.org> > > > > > > Simon, this patch appears to be assigned to you in patchwork. Will you apply it now the merge window is open, or are you assuming it will go through the Tegra tree with all the PCIe patches? > > > > I can pick it up. Applied to u-boot-dm.
diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 1fdb4f0d9ce9..275971d40096 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -219,13 +219,13 @@ int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, for (i = 0; i < num; i++) { debug("pci address #%d: %08lx %08lx %08lx\n", i, - (ulong)fdt_addr_to_cpu(cell[0]), - (ulong)fdt_addr_to_cpu(cell[1]), - (ulong)fdt_addr_to_cpu(cell[2])); - if ((fdt_addr_to_cpu(*cell) & type) == type) { - addr->phys_hi = fdt_addr_to_cpu(cell[0]); - addr->phys_mid = fdt_addr_to_cpu(cell[1]); - addr->phys_lo = fdt_addr_to_cpu(cell[2]); + (ulong)fdt32_to_cpu(cell[0]), + (ulong)fdt32_to_cpu(cell[1]), + (ulong)fdt32_to_cpu(cell[2])); + if ((fdt32_to_cpu(*cell) & type) == type) { + addr->phys_hi = fdt32_to_cpu(cell[0]); + addr->phys_mid = fdt32_to_cpu(cell[1]); + addr->phys_lo = fdt32_to_cpu(cell[1]); break; } else { cell += (FDT_PCI_ADDR_CELLS +