Message ID | 1431411164-2148-1-git-send-email-contact@huau-gabriel.fr |
---|---|
State | Superseded |
Delegated to: | Simon Glass |
Headers | show |
Please ignore this email/patch, I put the wrong message id ... On 05/11/2015 11:12 PM, Gabriel Huau wrote: > Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> > Acked-by: Simon Glass <sjg@chromium.org> > > --- > > Changes in v3: > - Rebase to the origin/master > > Changes in v2: > - Fix ordering of include header > > board/intel/minnowmax/minnowmax.c | 9 +++++++++ > include/configs/minnowmax.h | 1 + > 2 files changed, 10 insertions(+) > > diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c > index 1f5549a..383cae0 100644 > --- a/board/intel/minnowmax/minnowmax.c > +++ b/board/intel/minnowmax/minnowmax.c > @@ -5,6 +5,7 @@ > */ > > #include <common.h> > +#include <asm/gpio.h> > #include <asm/ibmpc.h> > #include <asm/pnp_def.h> > #include <netdev.h> > @@ -12,6 +13,14 @@ > > #define SERIAL_DEV PNP_DEV(0x2e, 4) > > +int arch_early_init_r(void) > +{ > + /* do the pin-muxing */ > + gpio_ich6_pinctrl_init(); > + > + return 0; > +} > + > int board_early_init_f(void) > { > lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); > diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h > index eb35a50..547765d 100644 > --- a/include/configs/minnowmax.h > +++ b/include/configs/minnowmax.h > @@ -15,6 +15,7 @@ > > #define CONFIG_SYS_MONITOR_LEN (1 << 20) > #define CONFIG_BOARD_EARLY_INIT_F > +#define CONFIG_ARCH_EARLY_INIT_R > > #define CONFIG_X86_SERIAL > #define CONFIG_SMSC_LPC47M
Hi Gabriel, I have two patches in patchwork: http://patchwork.ozlabs.org/patch/471146/ http://patchwork.ozlabs.org/patch/471147/ Are they the correct ones? Also do you know how to use the gpio command to toggle a bin on the Minnowboard MAX header? I'd like to try that. Regards, Simon On 12 May 2015 at 00:20, gabriel huau <contact@huau-gabriel.fr> wrote: > Please ignore this email/patch, I put the wrong message id ... > > > On 05/11/2015 11:12 PM, Gabriel Huau wrote: >> >> Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> >> Acked-by: Simon Glass <sjg@chromium.org> >> >> --- >> >> Changes in v3: >> - Rebase to the origin/master >> >> Changes in v2: >> - Fix ordering of include header >> >> board/intel/minnowmax/minnowmax.c | 9 +++++++++ >> include/configs/minnowmax.h | 1 + >> 2 files changed, 10 insertions(+) >> >> diff --git a/board/intel/minnowmax/minnowmax.c >> b/board/intel/minnowmax/minnowmax.c >> index 1f5549a..383cae0 100644 >> --- a/board/intel/minnowmax/minnowmax.c >> +++ b/board/intel/minnowmax/minnowmax.c >> @@ -5,6 +5,7 @@ >> */ >> #include <common.h> >> +#include <asm/gpio.h> >> #include <asm/ibmpc.h> >> #include <asm/pnp_def.h> >> #include <netdev.h> >> @@ -12,6 +13,14 @@ >> #define SERIAL_DEV PNP_DEV(0x2e, 4) >> +int arch_early_init_r(void) >> +{ >> + /* do the pin-muxing */ >> + gpio_ich6_pinctrl_init(); >> + >> + return 0; >> +} >> + >> int board_early_init_f(void) >> { >> lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); >> diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h >> index eb35a50..547765d 100644 >> --- a/include/configs/minnowmax.h >> +++ b/include/configs/minnowmax.h >> @@ -15,6 +15,7 @@ >> #define CONFIG_SYS_MONITOR_LEN (1 << 20) >> #define CONFIG_BOARD_EARLY_INIT_F >> +#define CONFIG_ARCH_EARLY_INIT_R >> #define CONFIG_X86_SERIAL >> #define CONFIG_SMSC_LPC47M > >
Hi Simon, I just submitted a new version of the patch, actually, when I tried to use the GPIO on the header I saw a typo in the code. To test it, you have to define these nodes in the device tree (should be there by default or not?): soc_gpio_s5_0@0 { gpio-offset = <0x80 0>; pad-offset = <0x1d0>; mode-gpio; output-value = <0>; direction = <PIN_OUTPUT>; }; soc_gpio_s5_1@0 { gpio-offset = <0x80 1>; pad-offset = <0x210>; mode-gpio; output-value = <0>; direction = <PIN_OUTPUT>; }; soc_gpio_s5_2@0 { gpio-offset = <0x80 2>; pad-offset = <0x1e0>; mode-gpio; output-value = <0>; direction = <PIN_OUTPUT>; }; And after, you can use the GPIO commands: => gpio set E0 gpio: pin E0 (gpio 128) value is 1 => gpio clear E0 gpio: pin E0 (gpio 128) value is 0 => gpio set E2 gpio: pin E2 (gpio 130) value is 1 => gpio clear E2 gpio: pin E2 (gpio 130) value is 0 E0 E1 and E2 correspond to the GPIO0 1 and 2. Regards, Gabriel On 05/20/2015 07:21 AM, Simon Glass wrote: > Hi Gabriel, > > I have two patches in patchwork: > > http://patchwork.ozlabs.org/patch/471146/ > http://patchwork.ozlabs.org/patch/471147/ > > Are they the correct ones? Also do you know how to use the gpio > command to toggle a bin on the Minnowboard MAX header? I'd like to try > that. > > Regards, > Simon > > > On 12 May 2015 at 00:20, gabriel huau <contact@huau-gabriel.fr> wrote: >> Please ignore this email/patch, I put the wrong message id ... >> >> >> On 05/11/2015 11:12 PM, Gabriel Huau wrote: >>> Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> >>> Acked-by: Simon Glass <sjg@chromium.org> >>> >>> --- >>> >>> Changes in v3: >>> - Rebase to the origin/master >>> >>> Changes in v2: >>> - Fix ordering of include header >>> >>> board/intel/minnowmax/minnowmax.c | 9 +++++++++ >>> include/configs/minnowmax.h | 1 + >>> 2 files changed, 10 insertions(+) >>> >>> diff --git a/board/intel/minnowmax/minnowmax.c >>> b/board/intel/minnowmax/minnowmax.c >>> index 1f5549a..383cae0 100644 >>> --- a/board/intel/minnowmax/minnowmax.c >>> +++ b/board/intel/minnowmax/minnowmax.c >>> @@ -5,6 +5,7 @@ >>> */ >>> #include <common.h> >>> +#include <asm/gpio.h> >>> #include <asm/ibmpc.h> >>> #include <asm/pnp_def.h> >>> #include <netdev.h> >>> @@ -12,6 +13,14 @@ >>> #define SERIAL_DEV PNP_DEV(0x2e, 4) >>> +int arch_early_init_r(void) >>> +{ >>> + /* do the pin-muxing */ >>> + gpio_ich6_pinctrl_init(); >>> + >>> + return 0; >>> +} >>> + >>> int board_early_init_f(void) >>> { >>> lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); >>> diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h >>> index eb35a50..547765d 100644 >>> --- a/include/configs/minnowmax.h >>> +++ b/include/configs/minnowmax.h >>> @@ -15,6 +15,7 @@ >>> #define CONFIG_SYS_MONITOR_LEN (1 << 20) >>> #define CONFIG_BOARD_EARLY_INIT_F >>> +#define CONFIG_ARCH_EARLY_INIT_R >>> #define CONFIG_X86_SERIAL >>> #define CONFIG_SMSC_LPC47M >>
Hi Gabriel, > > soc_gpio_s5_0@0 { > gpio-offset = <0x80 0>; > pad-offset = <0x1d0>; > mode-gpio; > output-value = <0>; > direction = <PIN_OUTPUT>; > }; > > soc_gpio_s5_1@0 { > gpio-offset = <0x80 1>; > pad-offset = <0x210>; > mode-gpio; > output-value = <0>; > direction = <PIN_OUTPUT>; > }; > > soc_gpio_s5_2@0 { > gpio-offset = <0x80 2>; > pad-offset = <0x1e0>; > mode-gpio; > output-value = <0>; > direction = <PIN_OUTPUT>; > }; > > And after, you can use the GPIO commands: > > => gpio set E0 > gpio: pin E0 (gpio 128) value is 1 > => gpio clear E0 > gpio: pin E0 (gpio 128) value is 0 > => gpio set E2 > gpio: pin E2 (gpio 130) value is 1 > => gpio clear E2 > gpio: pin E2 (gpio 130) value is 0 > > E0 E1 and E2 correspond to the GPIO0 1 and 2. Is there, or can someone add, some documentation somewhere as to how to convert between the device tree definition and the value used for "pin" in the gpio commands as it doesn't seem intuitive or obvious to me that what you have defined translates to E0, E1 and E2. Thanks, Andy.
Hi Andy, On 05/26/2015 01:01 AM, Andy Pont wrote: > Hi Gabriel, > >> soc_gpio_s5_0@0 { >> gpio-offset = <0x80 0>; >> pad-offset = <0x1d0>; >> mode-gpio; >> output-value = <0>; >> direction = <PIN_OUTPUT>; >> }; >> >> soc_gpio_s5_1@0 { >> gpio-offset = <0x80 1>; >> pad-offset = <0x210>; >> mode-gpio; >> output-value = <0>; >> direction = <PIN_OUTPUT>; >> }; >> >> soc_gpio_s5_2@0 { >> gpio-offset = <0x80 2>; >> pad-offset = <0x1e0>; >> mode-gpio; >> output-value = <0>; >> direction = <PIN_OUTPUT>; >> }; >> >> And after, you can use the GPIO commands: >> >> => gpio set E0 >> gpio: pin E0 (gpio 128) value is 1 >> => gpio clear E0 >> gpio: pin E0 (gpio 128) value is 0 >> => gpio set E2 >> gpio: pin E2 (gpio 130) value is 1 >> => gpio clear E2 >> gpio: pin E2 (gpio 130) value is 0 >> >> E0 E1 and E2 correspond to the GPIO0 1 and 2. > Is there, or can someone add, some documentation somewhere as to how to > convert between the device tree definition and the value used for "pin" in > the gpio commands as it doesn't seem intuitive or obvious to me that what > you have defined translates to E0, E1 and E2. I agree, but I think the documentation should be part of another patch, especially as this is the case for all the x86 platform. The naming is not specific to the minnowboard max (baytrail). > Thanks, > > Andy. > Regards, Gabriel
Hi Gabriel, On 25 May 2015 at 23:30, gabriel huau <contact@huau-gabriel.fr> wrote: > Hi Simon, > > I just submitted a new version of the patch, actually, when I tried to use > the GPIO on the header I saw a typo in the code. > > To test it, you have to define these nodes in the device tree (should be > there by default or not?): Yes I think so. Can you please send a patch? > > soc_gpio_s5_0@0 { > gpio-offset = <0x80 0>; > pad-offset = <0x1d0>; > mode-gpio; > output-value = <0>; > direction = <PIN_OUTPUT>; > }; > > soc_gpio_s5_1@0 { > gpio-offset = <0x80 1>; > pad-offset = <0x210>; > mode-gpio; > output-value = <0>; > direction = <PIN_OUTPUT>; > }; > > soc_gpio_s5_2@0 { > gpio-offset = <0x80 2>; > pad-offset = <0x1e0>; > mode-gpio; > output-value = <0>; > direction = <PIN_OUTPUT>; > }; > > And after, you can use the GPIO commands: > > => gpio set E0 > gpio: pin E0 (gpio 128) value is 1 > => gpio clear E0 > gpio: pin E0 (gpio 128) value is 0 > => gpio set E2 > gpio: pin E2 (gpio 130) value is 1 > => gpio clear E2 > gpio: pin E2 (gpio 130) value is 0 > > E0 E1 and E2 correspond to the GPIO0 1 and 2. OK thanks, that seems to work for me. I tested these with a multimeter and can adjust the output. Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Regards, Simon > > Regards, > Gabriel > > > On 05/20/2015 07:21 AM, Simon Glass wrote: >> >> Hi Gabriel, >> >> I have two patches in patchwork: >> >> http://patchwork.ozlabs.org/patch/471146/ >> http://patchwork.ozlabs.org/patch/471147/ >> >> Are they the correct ones? Also do you know how to use the gpio >> command to toggle a bin on the Minnowboard MAX header? I'd like to try >> that. >> >> Regards, >> Simon >> >> >> On 12 May 2015 at 00:20, gabriel huau <contact@huau-gabriel.fr> wrote: >>> >>> Please ignore this email/patch, I put the wrong message id ... >>> >>> >>> On 05/11/2015 11:12 PM, Gabriel Huau wrote: >>>> >>>> Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> >>>> Acked-by: Simon Glass <sjg@chromium.org> >>>> >>>> --- >>>> >>>> Changes in v3: >>>> - Rebase to the origin/master >>>> >>>> Changes in v2: >>>> - Fix ordering of include header >>>> >>>> board/intel/minnowmax/minnowmax.c | 9 +++++++++ >>>> include/configs/minnowmax.h | 1 + >>>> 2 files changed, 10 insertions(+) >>>> >>>> diff --git a/board/intel/minnowmax/minnowmax.c >>>> b/board/intel/minnowmax/minnowmax.c >>>> index 1f5549a..383cae0 100644 >>>> --- a/board/intel/minnowmax/minnowmax.c >>>> +++ b/board/intel/minnowmax/minnowmax.c >>>> @@ -5,6 +5,7 @@ >>>> */ >>>> #include <common.h> >>>> +#include <asm/gpio.h> >>>> #include <asm/ibmpc.h> >>>> #include <asm/pnp_def.h> >>>> #include <netdev.h> >>>> @@ -12,6 +13,14 @@ >>>> #define SERIAL_DEV PNP_DEV(0x2e, 4) >>>> +int arch_early_init_r(void) >>>> +{ >>>> + /* do the pin-muxing */ >>>> + gpio_ich6_pinctrl_init(); >>>> + >>>> + return 0; >>>> +} >>>> + >>>> int board_early_init_f(void) >>>> { >>>> lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); >>>> diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h >>>> index eb35a50..547765d 100644 >>>> --- a/include/configs/minnowmax.h >>>> +++ b/include/configs/minnowmax.h >>>> @@ -15,6 +15,7 @@ >>>> #define CONFIG_SYS_MONITOR_LEN (1 << 20) >>>> #define CONFIG_BOARD_EARLY_INIT_F >>>> +#define CONFIG_ARCH_EARLY_INIT_R >>>> #define CONFIG_X86_SERIAL >>>> #define CONFIG_SMSC_LPC47M >>> >>> >
Hi Gabriel, On 26 May 2015 at 08:41, Gabriel Huau <contact@huau-gabriel.fr> wrote: > Hi Andy, > > On 05/26/2015 01:01 AM, Andy Pont wrote: >> >> Hi Gabriel, >> >> >>> soc_gpio_s5_0@0 { >>> gpio-offset = <0x80 0>; >>> pad-offset = <0x1d0>; >>> mode-gpio; >>> output-value = <0>; >>> direction = <PIN_OUTPUT>; >>> }; >>> >>> soc_gpio_s5_1@0 { >>> gpio-offset = <0x80 1>; >>> pad-offset = <0x210>; >>> mode-gpio; >>> output-value = <0>; >>> direction = <PIN_OUTPUT>; >>> }; >>> >>> soc_gpio_s5_2@0 { >>> gpio-offset = <0x80 2>; >>> pad-offset = <0x1e0>; >>> mode-gpio; >>> output-value = <0>; >>> direction = <PIN_OUTPUT>; >>> }; >>> >>> And after, you can use the GPIO commands: >>> >>> => gpio set E0 >>> gpio: pin E0 (gpio 128) value is 1 >>> => gpio clear E0 >>> gpio: pin E0 (gpio 128) value is 0 >>> => gpio set E2 >>> gpio: pin E2 (gpio 130) value is 1 >>> => gpio clear E2 >>> gpio: pin E2 (gpio 130) value is 0 >>> >>> E0 E1 and E2 correspond to the GPIO0 1 and 2. >> >> Is there, or can someone add, some documentation somewhere as to how to >> convert between the device tree definition and the value used for "pin" in >> the gpio commands as it doesn't seem intuitive or obvious to me that what >> you have defined translates to E0, E1 and E2. > > I agree, but I think the documentation should be part of another patch, > especially as this is the case for all the x86 platform. > The naming is not specific to the minnowboard max (baytrail). Sounds good, please go ahead. Regards, Simon
diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c index 1f5549a..383cae0 100644 --- a/board/intel/minnowmax/minnowmax.c +++ b/board/intel/minnowmax/minnowmax.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <asm/gpio.h> #include <asm/ibmpc.h> #include <asm/pnp_def.h> #include <netdev.h> @@ -12,6 +13,14 @@ #define SERIAL_DEV PNP_DEV(0x2e, 4) +int arch_early_init_r(void) +{ + /* do the pin-muxing */ + gpio_ich6_pinctrl_init(); + + return 0; +} + int board_early_init_f(void) { lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index eb35a50..547765d 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -15,6 +15,7 @@ #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_X86_SERIAL #define CONFIG_SMSC_LPC47M