[{"id":1961164,"web_url":"http://patchwork.ozlabs.org/comment/1961164/","msgid":"<20180725175640.220b3e42@bbrezillon>","list_archive_url":null,"date":"2018-07-25T15:56:40","subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","submitter":{"id":73370,"url":"http://patchwork.ozlabs.org/api/people/73370/","name":"Boris Brezillon","email":"boris.brezillon@bootlin.com"},"content":"On Wed, 25 Jul 2018 15:31:47 +0200\nMiquel Raynal wrote:\n\n> Two helpers have been added to the core to do all kind of controller\n> side configuration/initialization between the detection phase and the\n> final NAND scan. Implement these hooks so that we can convert the driver\n> to just use nand_scan() instead of the nand_scan_ident() +\n> nand_scan_tail() pair.\n> \n> Signed-off-by: Miquel Raynal \n\nReviewed-by: Boris Brezillon \n\n> ---\n> drivers/mtd/nand/raw/tegra_nand.c | 162 +++++++++++++++++++++-----------------\n> 1 file changed, 88 insertions(+), 74 deletions(-)\n> \n> diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c\n> index 31c0d9ca9d23..79da1efc88d1 100644\n> --- a/drivers/mtd/nand/raw/tegra_nand.c\n> +++ b/drivers/mtd/nand/raw/tegra_nand.c\n> @@ -906,74 +906,13 @@ static int tegra_nand_select_strength(struct nand_chip *chip, int oobsize)\n> \t\t\t\t bits_per_step, oobsize);\n> }\n> \n> -static int tegra_nand_chips_init(struct device *dev,\n> -\t\t\t\t struct tegra_nand_controller *ctrl)\n> +static int tegra_nand_attach_chip(struct nand_chip *chip)\n> {\n> -\tstruct device_node *np = dev->of_node;\n> -\tstruct device_node *np_nand;\n> -\tint nsels, nchips = of_get_child_count(np);\n> -\tstruct tegra_nand_chip *nand;\n> -\tstruct mtd_info *mtd;\n> -\tstruct nand_chip *chip;\n> +\tstruct tegra_nand_controller *ctrl = to_tegra_ctrl(chip->controller);\n> +\tstruct tegra_nand_chip *nand = to_tegra_chip(chip);\n> +\tstruct mtd_info *mtd = nand_to_mtd(chip);\n> \tint bits_per_step;\n> \tint ret;\n> -\tu32 cs;\n> -\n> -\tif (nchips != 1) {\n> -\t\tdev_err(dev, \"Currently only one NAND chip supported\\n\");\n> -\t\treturn -EINVAL;\n> -\t}\n> -\n> -\tnp_nand = of_get_next_child(np, NULL);\n> -\n> -\tnsels = of_property_count_elems_of_size(np_nand, \"reg\", sizeof(u32));\n> -\tif (nsels != 1) {\n> -\t\tdev_err(dev, \"Missing/invalid reg property\\n\");\n> -\t\treturn -EINVAL;\n> -\t}\n> -\n> -\t/* Retrieve CS id, currently only single die NAND supported */\n> -\tret = of_property_read_u32(np_nand, \"reg\", &cs);\n> -\tif (ret) {\n> -\t\tdev_err(dev, \"could not retrieve reg property: %d\\n\", ret);\n> -\t\treturn ret;\n> -\t}\n> -\n> -\tnand = devm_kzalloc(dev, sizeof(*nand), GFP_KERNEL);\n> -\tif (!nand)\n> -\t\treturn -ENOMEM;\n> -\n> -\tnand->cs[0] = cs;\n> -\n> -\tnand->wp_gpio = devm_gpiod_get_optional(dev, \"wp\", GPIOD_OUT_LOW);\n> -\n> -\tif (IS_ERR(nand->wp_gpio)) {\n> -\t\tret = PTR_ERR(nand->wp_gpio);\n> -\t\tdev_err(dev, \"Failed to request WP GPIO: %d\\n\", ret);\n> -\t\treturn ret;\n> -\t}\n> -\n> -\tchip = &nand->chip;\n> -\tchip->controller = &ctrl->controller;\n> -\n> -\tmtd = nand_to_mtd(chip);\n> -\n> -\tmtd->dev.parent = dev;\n> -\tmtd->owner = THIS_MODULE;\n> -\n> -\tnand_set_flash_node(chip, np_nand);\n> -\n> -\tif (!mtd->name)\n> -\t\tmtd->name = \"tegra_nand\";\n> -\n> -\tchip->options = NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;\n> -\tchip->exec_op = tegra_nand_exec_op;\n> -\tchip->select_chip = tegra_nand_select_chip;\n> -\tchip->setup_data_interface = tegra_nand_setup_data_interface;\n> -\n> -\tret = nand_scan_ident(mtd, 1, NULL);\n> -\tif (ret)\n> -\t\treturn ret;\n> \n> \tif (chip->bbt_options & NAND_BBT_USE_FLASH)\n> \t\tchip->bbt_options |= NAND_BBT_NO_OOB;\n> @@ -982,7 +921,8 @@ static int tegra_nand_chips_init(struct device *dev,\n> \tchip->ecc.size = 512;\n> \tchip->ecc.steps = mtd->writesize / chip->ecc.size;\n> \tif (chip->ecc_step_ds != 512) {\n> -\t\tdev_err(dev, \"Unsupported step size %d\\n\", chip->ecc_step_ds);\n> +\t\tdev_err(ctrl->dev, \"Unsupported step size %d\\n\",\n> +\t\t\tchip->ecc_step_ds);\n> \t\treturn -EINVAL;\n> \t}\n> \n> @@ -1004,14 +944,15 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t}\n> \n> \tif (chip->ecc.algo == NAND_ECC_BCH && mtd->writesize < 2048) {\n> -\t\tdev_err(dev, \"BCH supports 2K or 4K page size only\\n\");\n> +\t\tdev_err(ctrl->dev, \"BCH supports 2K or 4K page size only\\n\");\n> \t\treturn -EINVAL;\n> \t}\n> \n> \tif (!chip->ecc.strength) {\n> \t\tret = tegra_nand_select_strength(chip, mtd->oobsize);\n> \t\tif (ret < 0) {\n> -\t\t\tdev_err(dev, \"No valid strength found, minimum %d\\n\",\n> +\t\t\tdev_err(ctrl->dev,\n> +\t\t\t\t\"No valid strength found, minimum %d\\n\",\n> \t\t\t\tchip->ecc_strength_ds);\n> \t\t\treturn ret;\n> \t\t}\n> @@ -1039,7 +980,7 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t\t\tnand->config_ecc |= CONFIG_TVAL_8;\n> \t\t\tbreak;\n> \t\tdefault:\n> -\t\t\tdev_err(dev, \"ECC strength %d not supported\\n\",\n> +\t\t\tdev_err(ctrl->dev, \"ECC strength %d not supported\\n\",\n> \t\t\t\tchip->ecc.strength);\n> \t\t\treturn -EINVAL;\n> \t\t}\n> @@ -1062,17 +1003,17 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t\t\tnand->bch_config |= BCH_TVAL_16;\n> \t\t\tbreak;\n> \t\tdefault:\n> -\t\t\tdev_err(dev, \"ECC strength %d not supported\\n\",\n> +\t\t\tdev_err(ctrl->dev, \"ECC strength %d not supported\\n\",\n> \t\t\t\tchip->ecc.strength);\n> \t\t\treturn -EINVAL;\n> \t\t}\n> \t\tbreak;\n> \tdefault:\n> -\t\tdev_err(dev, \"ECC algorithm not supported\\n\");\n> +\t\tdev_err(ctrl->dev, \"ECC algorithm not supported\\n\");\n> \t\treturn -EINVAL;\n> \t}\n> \n> -\tdev_info(dev, \"Using %s with strength %d per 512 byte step\\n\",\n> +\tdev_info(ctrl->dev, \"Using %s with strength %d per 512 byte step\\n\",\n> \t\t chip->ecc.algo == NAND_ECC_BCH ? \"BCH\" : \"RS\",\n> \t\t chip->ecc.strength);\n> \n> @@ -1095,7 +1036,8 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t\tnand->config |= CONFIG_PS_4096;\n> \t\tbreak;\n> \tdefault:\n> -\t\tdev_err(dev, \"Unsupported writesize %d\\n\", mtd->writesize);\n> +\t\tdev_err(ctrl->dev, \"Unsupported writesize %d\\n\",\n> +\t\t\tmtd->writesize);\n> \t\treturn -ENODEV;\n> \t}\n> \n> @@ -1106,7 +1048,78 @@ static int tegra_nand_chips_init(struct device *dev,\n> \tnand->config |= CONFIG_TAG_BYTE_SIZE(mtd->oobsize - 1);\n> \twritel_relaxed(nand->config, ctrl->regs + CONFIG);\n> \n> -\tret = nand_scan_tail(mtd);\n> +\treturn 0;\n> +}\n> +\n> +static const struct nand_controller_ops tegra_nand_controller_ops = {\n> +\t.attach_chip = &tegra_nand_attach_chip,\n> +};\n> +\n> +static int tegra_nand_chips_init(struct device *dev,\n> +\t\t\t\t struct tegra_nand_controller *ctrl)\n> +{\n> +\tstruct device_node *np = dev->of_node;\n> +\tstruct device_node *np_nand;\n> +\tint nsels, nchips = of_get_child_count(np);\n> +\tstruct tegra_nand_chip *nand;\n> +\tstruct mtd_info *mtd;\n> +\tstruct nand_chip *chip;\n> +\tint ret;\n> +\tu32 cs;\n> +\n> +\tif (nchips != 1) {\n> +\t\tdev_err(dev, \"Currently only one NAND chip supported\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\tnp_nand = of_get_next_child(np, NULL);\n> +\n> +\tnsels = of_property_count_elems_of_size(np_nand, \"reg\", sizeof(u32));\n> +\tif (nsels != 1) {\n> +\t\tdev_err(dev, \"Missing/invalid reg property\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\t/* Retrieve CS id, currently only single die NAND supported */\n> +\tret = of_property_read_u32(np_nand, \"reg\", &cs);\n> +\tif (ret) {\n> +\t\tdev_err(dev, \"could not retrieve reg property: %d\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\n> +\tnand = devm_kzalloc(dev, sizeof(*nand), GFP_KERNEL);\n> +\tif (!nand)\n> +\t\treturn -ENOMEM;\n> +\n> +\tnand->cs[0] = cs;\n> +\n> +\tnand->wp_gpio = devm_gpiod_get_optional(dev, \"wp\", GPIOD_OUT_LOW);\n> +\n> +\tif (IS_ERR(nand->wp_gpio)) {\n> +\t\tret = PTR_ERR(nand->wp_gpio);\n> +\t\tdev_err(dev, \"Failed to request WP GPIO: %d\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\n> +\tchip = &nand->chip;\n> +\tchip->controller = &ctrl->controller;\n> +\n> +\tmtd = nand_to_mtd(chip);\n> +\n> +\tmtd->dev.parent = dev;\n> +\tmtd->owner = THIS_MODULE;\n> +\n> +\tnand_set_flash_node(chip, np_nand);\n> +\n> +\tif (!mtd->name)\n> +\t\tmtd->name = \"tegra_nand\";\n> +\n> +\tchip->options = NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;\n> +\tchip->exec_op = tegra_nand_exec_op;\n> +\tchip->select_chip = tegra_nand_select_chip;\n> +\tchip->setup_data_interface = tegra_nand_setup_data_interface;\n> +\n> +\tret = nand_scan(mtd, 1);\n> \tif (ret)\n> \t\treturn ret;\n> \n> @@ -1137,6 +1150,7 @@ static int tegra_nand_probe(struct platform_device *pdev)\n> \n> \tctrl->dev = &pdev->dev;\n> \tnand_controller_init(&ctrl->controller);\n> +\tctrl->controller.ops = &tegra_nand_controller_ops;\n> \n> \tres = platform_get_resource(pdev, IORESOURCE_MEM, 0);\n> \tctrl->regs = devm_ioremap_resource(&pdev->dev, res);","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org\n\t(client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=bootlin.com","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"G0qgX+fi\"; \n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) 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autolearn=disabled version=3.4.0","Date":"Wed, 25 Jul 2018 17:56:40 +0200","From":"Boris Brezillon ","To":"Miquel Raynal ","Subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","Message-ID":"<20180725175640.220b3e42@bbrezillon>","In-Reply-To":"<20180725133152.30898-13-miquel.raynal@bootlin.com>","References":"<20180725133152.30898-1-miquel.raynal@bootlin.com>\n\t<20180725133152.30898-13-miquel.raynal@bootlin.com>","X-Mailer":"Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20180725_115710_010080_655F79FF ","X-CRM114-Status":"GOOD ( 24.91 )","X-Spam-Score":"-0.0 (/)","X-Spam-Report":"SpamAssassin version 3.4.1 on merlin.infradead.org summary:\n\tContent analysis details: (-0.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [62.4.15.54 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Lucas Stach , Wenyou Yang ,\n\tRichard Weinberger , Stefan Agner , \n\tMarek Vasut , linux-mtd@lists.infradead.org,\n\tJosh Wu ,\n\tBrian Norris , \n\tDavid Woodhouse ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1962118,"web_url":"http://patchwork.ozlabs.org/comment/1962118/","msgid":"","list_archive_url":null,"date":"2018-07-26T16:29:36","subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","submitter":{"id":4137,"url":"http://patchwork.ozlabs.org/api/people/4137/","name":"Stefan Agner","email":"stefan@agner.ch"},"content":"On 25.07.2018 15:31, Miquel Raynal wrote:\n> Two helpers have been added to the core to do all kind of controller\n> side configuration/initialization between the detection phase and the\n> final NAND scan. Implement these hooks so that we can convert the driver\n> to just use nand_scan() instead of the nand_scan_ident() +\n> nand_scan_tail() pair.\n> \n\nWhile the patch looks technically correct, I wonder whether the driver\nnow does what we expect it from attach logically...\n\nE.g. shouldn't we get the wp_gpio in attach?\n\n--\nStefan\n\n> Signed-off-by: Miquel Raynal \n> ---\n> drivers/mtd/nand/raw/tegra_nand.c | 162 +++++++++++++++++++++-----------------\n> 1 file changed, 88 insertions(+), 74 deletions(-)\n> \n> diff --git a/drivers/mtd/nand/raw/tegra_nand.c\n> b/drivers/mtd/nand/raw/tegra_nand.c\n> index 31c0d9ca9d23..79da1efc88d1 100644\n> --- a/drivers/mtd/nand/raw/tegra_nand.c\n> +++ b/drivers/mtd/nand/raw/tegra_nand.c\n> @@ -906,74 +906,13 @@ static int tegra_nand_select_strength(struct\n> nand_chip *chip, int oobsize)\n> \t\t\t\t bits_per_step, oobsize);\n> }\n> \n> -static int tegra_nand_chips_init(struct device *dev,\n> -\t\t\t\t struct tegra_nand_controller *ctrl)\n> +static int tegra_nand_attach_chip(struct nand_chip *chip)\n> {\n> -\tstruct device_node *np = dev->of_node;\n> -\tstruct device_node *np_nand;\n> -\tint nsels, nchips = of_get_child_count(np);\n> -\tstruct tegra_nand_chip *nand;\n> -\tstruct mtd_info *mtd;\n> -\tstruct nand_chip *chip;\n> +\tstruct tegra_nand_controller *ctrl = to_tegra_ctrl(chip->controller);\n> +\tstruct tegra_nand_chip *nand = to_tegra_chip(chip);\n> +\tstruct mtd_info *mtd = nand_to_mtd(chip);\n> \tint bits_per_step;\n> \tint ret;\n> -\tu32 cs;\n> -\n> -\tif (nchips != 1) {\n> -\t\tdev_err(dev, \"Currently only one NAND chip supported\\n\");\n> -\t\treturn -EINVAL;\n> -\t}\n> -\n> -\tnp_nand = of_get_next_child(np, NULL);\n> -\n> -\tnsels = of_property_count_elems_of_size(np_nand, \"reg\", sizeof(u32));\n> -\tif (nsels != 1) {\n> -\t\tdev_err(dev, \"Missing/invalid reg property\\n\");\n> -\t\treturn -EINVAL;\n> -\t}\n> -\n> -\t/* Retrieve CS id, currently only single die NAND supported */\n> -\tret = of_property_read_u32(np_nand, \"reg\", &cs);\n> -\tif (ret) {\n> -\t\tdev_err(dev, \"could not retrieve reg property: %d\\n\", ret);\n> -\t\treturn ret;\n> -\t}\n> -\n> -\tnand = devm_kzalloc(dev, sizeof(*nand), GFP_KERNEL);\n> -\tif (!nand)\n> -\t\treturn -ENOMEM;\n> -\n> -\tnand->cs[0] = cs;\n> -\n> -\tnand->wp_gpio = devm_gpiod_get_optional(dev, \"wp\", GPIOD_OUT_LOW);\n> -\n> -\tif (IS_ERR(nand->wp_gpio)) {\n> -\t\tret = PTR_ERR(nand->wp_gpio);\n> -\t\tdev_err(dev, \"Failed to request WP GPIO: %d\\n\", ret);\n> -\t\treturn ret;\n> -\t}\n> -\n> -\tchip = &nand->chip;\n> -\tchip->controller = &ctrl->controller;\n> -\n> -\tmtd = nand_to_mtd(chip);\n> -\n> -\tmtd->dev.parent = dev;\n> -\tmtd->owner = THIS_MODULE;\n> -\n> -\tnand_set_flash_node(chip, np_nand);\n> -\n> -\tif (!mtd->name)\n> -\t\tmtd->name = \"tegra_nand\";\n> -\n> -\tchip->options = NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;\n> -\tchip->exec_op = tegra_nand_exec_op;\n> -\tchip->select_chip = tegra_nand_select_chip;\n> -\tchip->setup_data_interface = tegra_nand_setup_data_interface;\n> -\n> -\tret = nand_scan_ident(mtd, 1, NULL);\n> -\tif (ret)\n> -\t\treturn ret;\n> \n> \tif (chip->bbt_options & NAND_BBT_USE_FLASH)\n> \t\tchip->bbt_options |= NAND_BBT_NO_OOB;\n> @@ -982,7 +921,8 @@ static int tegra_nand_chips_init(struct device *dev,\n> \tchip->ecc.size = 512;\n> \tchip->ecc.steps = mtd->writesize / chip->ecc.size;\n> \tif (chip->ecc_step_ds != 512) {\n> -\t\tdev_err(dev, \"Unsupported step size %d\\n\", chip->ecc_step_ds);\n> +\t\tdev_err(ctrl->dev, \"Unsupported step size %d\\n\",\n> +\t\t\tchip->ecc_step_ds);\n> \t\treturn -EINVAL;\n> \t}\n> \n> @@ -1004,14 +944,15 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t}\n> \n> \tif (chip->ecc.algo == NAND_ECC_BCH && mtd->writesize < 2048) {\n> -\t\tdev_err(dev, \"BCH supports 2K or 4K page size only\\n\");\n> +\t\tdev_err(ctrl->dev, \"BCH supports 2K or 4K page size only\\n\");\n> \t\treturn -EINVAL;\n> \t}\n> \n> \tif (!chip->ecc.strength) {\n> \t\tret = tegra_nand_select_strength(chip, mtd->oobsize);\n> \t\tif (ret < 0) {\n> -\t\t\tdev_err(dev, \"No valid strength found, minimum %d\\n\",\n> +\t\t\tdev_err(ctrl->dev,\n> +\t\t\t\t\"No valid strength found, minimum %d\\n\",\n> \t\t\t\tchip->ecc_strength_ds);\n> \t\t\treturn ret;\n> \t\t}\n> @@ -1039,7 +980,7 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t\t\tnand->config_ecc |= CONFIG_TVAL_8;\n> \t\t\tbreak;\n> \t\tdefault:\n> -\t\t\tdev_err(dev, \"ECC strength %d not supported\\n\",\n> +\t\t\tdev_err(ctrl->dev, \"ECC strength %d not supported\\n\",\n> \t\t\t\tchip->ecc.strength);\n> \t\t\treturn -EINVAL;\n> \t\t}\n> @@ -1062,17 +1003,17 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t\t\tnand->bch_config |= BCH_TVAL_16;\n> \t\t\tbreak;\n> \t\tdefault:\n> -\t\t\tdev_err(dev, \"ECC strength %d not supported\\n\",\n> +\t\t\tdev_err(ctrl->dev, \"ECC strength %d not supported\\n\",\n> \t\t\t\tchip->ecc.strength);\n> \t\t\treturn -EINVAL;\n> \t\t}\n> \t\tbreak;\n> \tdefault:\n> -\t\tdev_err(dev, \"ECC algorithm not supported\\n\");\n> +\t\tdev_err(ctrl->dev, \"ECC algorithm not supported\\n\");\n> \t\treturn -EINVAL;\n> \t}\n> \n> -\tdev_info(dev, \"Using %s with strength %d per 512 byte step\\n\",\n> +\tdev_info(ctrl->dev, \"Using %s with strength %d per 512 byte step\\n\",\n> \t\t chip->ecc.algo == NAND_ECC_BCH ? \"BCH\" : \"RS\",\n> \t\t chip->ecc.strength);\n> \n> @@ -1095,7 +1036,8 @@ static int tegra_nand_chips_init(struct device *dev,\n> \t\tnand->config |= CONFIG_PS_4096;\n> \t\tbreak;\n> \tdefault:\n> -\t\tdev_err(dev, \"Unsupported writesize %d\\n\", mtd->writesize);\n> +\t\tdev_err(ctrl->dev, \"Unsupported writesize %d\\n\",\n> +\t\t\tmtd->writesize);\n> \t\treturn -ENODEV;\n> \t}\n> \n> @@ -1106,7 +1048,78 @@ static int tegra_nand_chips_init(struct device *dev,\n> \tnand->config |= CONFIG_TAG_BYTE_SIZE(mtd->oobsize - 1);\n> \twritel_relaxed(nand->config, ctrl->regs + CONFIG);\n> \n> -\tret = nand_scan_tail(mtd);\n> +\treturn 0;\n> +}\n> +\n> +static const struct nand_controller_ops tegra_nand_controller_ops = {\n> +\t.attach_chip = &tegra_nand_attach_chip,\n> +};\n> +\n> +static int tegra_nand_chips_init(struct device *dev,\n> +\t\t\t\t struct tegra_nand_controller *ctrl)\n> +{\n> +\tstruct device_node *np = dev->of_node;\n> +\tstruct device_node *np_nand;\n> +\tint nsels, nchips = of_get_child_count(np);\n> +\tstruct tegra_nand_chip *nand;\n> +\tstruct mtd_info *mtd;\n> +\tstruct nand_chip *chip;\n> +\tint ret;\n> +\tu32 cs;\n> +\n> +\tif (nchips != 1) {\n> +\t\tdev_err(dev, \"Currently only one NAND chip supported\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\tnp_nand = of_get_next_child(np, NULL);\n> +\n> +\tnsels = of_property_count_elems_of_size(np_nand, \"reg\", sizeof(u32));\n> +\tif (nsels != 1) {\n> +\t\tdev_err(dev, \"Missing/invalid reg property\\n\");\n> +\t\treturn -EINVAL;\n> +\t}\n> +\n> +\t/* Retrieve CS id, currently only single die NAND supported */\n> +\tret = of_property_read_u32(np_nand, \"reg\", &cs);\n> +\tif (ret) {\n> +\t\tdev_err(dev, \"could not retrieve reg property: %d\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\n> +\tnand = devm_kzalloc(dev, sizeof(*nand), GFP_KERNEL);\n> +\tif (!nand)\n> +\t\treturn -ENOMEM;\n> +\n> +\tnand->cs[0] = cs;\n> +\n> +\tnand->wp_gpio = devm_gpiod_get_optional(dev, \"wp\", GPIOD_OUT_LOW);\n> +\n> +\tif (IS_ERR(nand->wp_gpio)) {\n> +\t\tret = PTR_ERR(nand->wp_gpio);\n> +\t\tdev_err(dev, \"Failed to request WP GPIO: %d\\n\", ret);\n> +\t\treturn ret;\n> +\t}\n> +\n> +\tchip = &nand->chip;\n> +\tchip->controller = &ctrl->controller;\n> +\n> +\tmtd = nand_to_mtd(chip);\n> +\n> +\tmtd->dev.parent = dev;\n> +\tmtd->owner = THIS_MODULE;\n> +\n> +\tnand_set_flash_node(chip, np_nand);\n> +\n> +\tif (!mtd->name)\n> +\t\tmtd->name = \"tegra_nand\";\n> +\n> +\tchip->options = NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;\n> +\tchip->exec_op = tegra_nand_exec_op;\n> +\tchip->select_chip = tegra_nand_select_chip;\n> +\tchip->setup_data_interface = tegra_nand_setup_data_interface;\n> +\n> +\tret = nand_scan(mtd, 1);\n> \tif (ret)\n> \t\treturn ret;\n> \n> @@ -1137,6 +1150,7 @@ static int tegra_nand_probe(struct platform_device *pdev)\n> \n> \tctrl->dev = &pdev->dev;\n> \tnand_controller_init(&ctrl->controller);\n> +\tctrl->controller.ops = &tegra_nand_controller_ops;\n> \n> \tres = platform_get_resource(pdev, IORESOURCE_MEM, 0);\n> \tctrl->regs = devm_ioremap_resource(&pdev->dev, res);","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org\n\t(client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=agner.ch","ozlabs.org; dkim=pass (2048-bit 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s=dkim;\n\tt=1532622576;\n\th=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n\tto:to:cc:cc:mime-version:mime-version:content-type:content-type:\n\tcontent-transfer-encoding:content-transfer-encoding:\n\tin-reply-to:in-reply-to:references:references;\n\tbh=MwW+3wN8bPyFXFsnaeaXHDw18mSzyEysQjM3RRaqKSo=;\n\tb=iN1/pKi8tkuys5YzWq01Xp+d/GqPFiIo/33+JlEej06GoRRB97TFyx5ccJc8WqK2FyRGPD\n\tCnRL0eA8K1NWZZQZ/DROwavk2L3G4n992NUz8e0L2viUYGKClvB+NG/yfDOV0oto5yjU0Y\n\thmoKpirwBNjjosKcsVr9jkrDqnS1pCE="],"MIME-Version":"1.0","Date":"Thu, 26 Jul 2018 18:29:36 +0200","From":"Stefan Agner ","To":"Miquel Raynal ","Subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","In-Reply-To":"<20180725133152.30898-13-miquel.raynal@bootlin.com>","References":"<20180725133152.30898-1-miquel.raynal@bootlin.com>\n\t<20180725133152.30898-13-miquel.raynal@bootlin.com>","Message-ID":"","X-Sender":"stefan@agner.ch","User-Agent":"Roundcube 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signature\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Lucas Stach , Wenyou Yang ,\n\tMarek Vasut ,\n\tRichard Weinberger , \n\tBoris Brezillon ,\n\tlinux-mtd@lists.infradead.org, Josh Wu ,\n\tBrian Norris , \n\tDavid Woodhouse ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1962190,"web_url":"http://patchwork.ozlabs.org/comment/1962190/","msgid":"<20180726200120.0dd4bcb7@bbrezillon>","list_archive_url":null,"date":"2018-07-26T18:01:20","subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","submitter":{"id":73370,"url":"http://patchwork.ozlabs.org/api/people/73370/","name":"Boris Brezillon","email":"boris.brezillon@bootlin.com"},"content":"On Thu, 26 Jul 2018 18:29:36 +0200\nStefan Agner wrote:\n\n> On 25.07.2018 15:31, Miquel Raynal wrote:\n> > Two helpers have been added to the core to do all kind of controller\n> > side configuration/initialization between the detection phase and the\n> > final NAND scan. Implement these hooks so that we can convert the driver\n> > to just use nand_scan() instead of the nand_scan_ident() +\n> > nand_scan_tail() pair.\n> > \n> \n> While the patch looks technically correct, I wonder whether the driver\n> now does what we expect it from attach logically...\n> \n> E.g. shouldn't we get the wp_gpio in attach?\n\nWell, this series does things mechanically to avoid breaking drivers (we\njust move all the code between ident and tail into the attach hook),\nbut any resource that is not needed for the identification phase and is\ntied to the NAND chip could/should be requested in the attach hook (the\nWP pin is such a resource).\n\nFeel free to send a patch to change that.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org\n\t(client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=bootlin.com","ozlabs.org; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=FVnhQCiLom48gYgpNIBBIyKfAVFAoQGcOuVFvMIw29o=;\n\tb=gOg5cZ4v2sLo0x\n\tTSOythNVD5TDxpdamuxyx2JWwE8W2546t6UoT6NAUlU425kz9HTMqzYb8Tepw+CI3m8yHpSrdhVrP\n\tpPjTIb0pa1pS76+sJLCG7E7s2rzrZhNLt2LLzG8jGI4HSvYccO6O1GjUzFNh8wXr18WJb2tYZsE0Q\n\tjbqcsdazUeFLyxyR/eOqJntsMXvGUgh7AMBGNgpYqRTszv7PRPZaSBPPS3CdL3YArf/moppX9JWpB\n\tSyV90N/pjH+MbEvGWenMmMkPpVDNed81rnRfd+iMxPpw0FlL7eB8jHj04P9HMTxT6j8E32ACIgYq0\n\tZxkHNTp04BgYGtPMSGAg==;","X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Thu, 26 Jul 2018 20:01:20 +0200","From":"Boris Brezillon ","To":"Stefan Agner ","Subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","Message-ID":"<20180726200120.0dd4bcb7@bbrezillon>","In-Reply-To":"","References":"<20180725133152.30898-1-miquel.raynal@bootlin.com>\n\t<20180725133152.30898-13-miquel.raynal@bootlin.com>\n\t","X-Mailer":"Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20180726_110142_952826_4227C9E3 ","X-CRM114-Status":"GOOD ( 14.19 )","X-Spam-Score":"-0.0 (/)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-0.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [62.4.15.54 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Lucas Stach , Wenyou Yang ,\n\tRichard Weinberger ,\n\tMarek Vasut , linux-mtd@lists.infradead.org,\n\tMiquel Raynal , \n\tJosh Wu ,\n\tBrian Norris , \n\tDavid Woodhouse ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1962661,"web_url":"http://patchwork.ozlabs.org/comment/1962661/","msgid":"<81b38ddf26e981adf6a0564708d2954e@agner.ch>","list_archive_url":null,"date":"2018-07-27T07:13:09","subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","submitter":{"id":4137,"url":"http://patchwork.ozlabs.org/api/people/4137/","name":"Stefan Agner","email":"stefan@agner.ch"},"content":"On 26.07.2018 20:01, Boris Brezillon wrote:\n> On Thu, 26 Jul 2018 18:29:36 +0200\n> Stefan Agner wrote:\n> \n>> On 25.07.2018 15:31, Miquel Raynal wrote:\n>> > Two helpers have been added to the core to do all kind of controller\n>> > side configuration/initialization between the detection phase and the\n>> > final NAND scan. Implement these hooks so that we can convert the driver\n>> > to just use nand_scan() instead of the nand_scan_ident() +\n>> > nand_scan_tail() pair.\n>> >\n>>\n>> While the patch looks technically correct, I wonder whether the driver\n>> now does what we expect it from attach logically...\n>>\n>> E.g. shouldn't we get the wp_gpio in attach?\n> \n> Well, this series does things mechanically to avoid breaking drivers (we\n> just move all the code between ident and tail into the attach hook),\n> but any resource that is not needed for the identification phase and is\n> tied to the NAND chip could/should be requested in the attach hook (the\n> WP pin is such a resource).\n\nOk, that makes completely sense and I agree with that approach! However,\nit is not obvious when looking at the series.\n\nCan we mention that fact in the commit log, e.g. something like:\n\n\"To avoid breaking this patch converts the driver mechanically by just\nmoving all the code between ...ident and ..tail into the attach hook.\nIdeally driver should request all resources tied to the NAND chip in the\nattach hook.\"\n\n--\nStefan\n\n> \n> Feel free to send a patch to change that.","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org\n\t(client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=agner.ch","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"Qw/58tIc\"; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:\n\tSubject:To:From:Date:MIME-Version:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=r4QOcY0WKPQtAFzKzfSQvhWEq+xXn3amaBkxOAlEeW8=;\n\tb=Qw/58tIcvTE+vT\n\tPEmOdhM7u/s51PsccAs3wiZJABhe038ZEnZVwCTYQ7Gah6XTLoE6p5ioI2kpgs7P0LCmRNoZ0MsM9\n\tzPc6EtvOuY3JRPWCqwkc0JySXzCfE+pSu7nBZZf266wXAE2LuBsYQLNxdSPls9Wkaye9h1D+MP7Iv\n\tnEPR0fE5Ej/vkbVXh0pBYzbDWWjWQbpO0Tcjd9XeziuyWmMd8B1NbYZJ+zrYxalwM6gMBFak44RTi\n\taZN31rpv0JMr2olKvaum/0fYiatF2diwSete6Y3gFVVg35eOwdscUDXIQiOhWxxAa8a7pKu7Q1bdn\n\tJnUUOnjbQ9kMQTyEy0UA==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim;\n\tt=1532675590;\n\th=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n\tto:to:cc:cc:mime-version:mime-version:content-type:content-type:\n\tcontent-transfer-encoding:content-transfer-encoding:\n\tin-reply-to:in-reply-to:references:references;\n\tbh=K0nzym7EK1741BCWlW+v/ZO5n1O28ZvbOTyKvqwWuWE=;\n\tb=t6pQnYVvUwyisji7icRIZRMiIsXphbvSYrUq1JjeqGO3cP+eJKoFdhtb0317P0/6MTtYMf\n\t3zidUnIEu7i95YUfiqMjKfgKq6w+YcWEA/IzORpTmr9WQpSB3l4isl2hldFNOGLBGgKILa\n\tgo8bDS+wFEYRxx+pAHQEORTsYwC5G70="],"MIME-Version":"1.0","Date":"Fri, 27 Jul 2018 09:13:09 +0200","From":"Stefan Agner ","To":"Boris Brezillon ","Subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","In-Reply-To":"<20180726200120.0dd4bcb7@bbrezillon>","References":"<20180725133152.30898-1-miquel.raynal@bootlin.com>\n\t<20180725133152.30898-13-miquel.raynal@bootlin.com>\n\t\n\t<20180726200120.0dd4bcb7@bbrezillon>","Message-ID":"<81b38ddf26e981adf6a0564708d2954e@agner.ch>","X-Sender":"stefan@agner.ch","User-Agent":"Roundcube Webmail/1.3.4","X-Spamd-Result":"default: False [-0.10 / 15.00]; TO_MATCH_ENVRCPT_ALL(0.00)[];\n\tMID_RHS_MATCH_FROM(0.00)[]; TAGGED_RCPT(0.00)[];\n\tMIME_GOOD(-0.10)[text/plain]; FROM_HAS_DN(0.00)[];\n\tRCPT_COUNT_SEVEN(0.00)[10]; FROM_EQ_ENVFROM(0.00)[];\n\tDKIM_SIGNED(0.00)[]; TO_DN_SOME(0.00)[];\n\tRCVD_COUNT_ZERO(0.00)[0];\n\tASN(0.00)[asn:29691, ipnet:2a02:418::/29, country:CH];\n\tRCVD_TLS_ALL(0.00)[]; ARC_NA(0.00)[]","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20180727_001325_113233_66F263AF ","X-CRM114-Status":"GOOD ( 15.72 )","X-Spam-Score":"-0.1 (/)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-0.1 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Lucas Stach , Wenyou Yang ,\n\tRichard Weinberger ,\n\tMarek Vasut , linux-mtd@lists.infradead.org,\n\tMiquel Raynal , \n\tJosh Wu ,\n\tBrian Norris , \n\tDavid Woodhouse ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1962692,"web_url":"http://patchwork.ozlabs.org/comment/1962692/","msgid":"<20180727100640.715d6cce@xps13>","list_archive_url":null,"date":"2018-07-27T08:06:40","subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","submitter":{"id":73368,"url":"http://patchwork.ozlabs.org/api/people/73368/","name":"Miquel Raynal","email":"miquel.raynal@bootlin.com"},"content":"Hi Stefan,\n\nStefan Agner wrote on Fri, 27 Jul 2018 09:13:09 +0200:\n\n> On 26.07.2018 20:01, Boris Brezillon wrote:\n> > On Thu, 26 Jul 2018 18:29:36 +0200\n> > Stefan Agner wrote:\n> > \n> >> On 25.07.2018 15:31, Miquel Raynal wrote: \n> >> > Two helpers have been added to the core to do all kind of controller\n> >> > side configuration/initialization between the detection phase and the\n> >> > final NAND scan. Implement these hooks so that we can convert the driver\n> >> > to just use nand_scan() instead of the nand_scan_ident() +\n> >> > nand_scan_tail() pair.\n> >> > \n> >>\n> >> While the patch looks technically correct, I wonder whether the driver\n> >> now does what we expect it from attach logically...\n> >>\n> >> E.g. shouldn't we get the wp_gpio in attach? \n> > \n> > Well, this series does things mechanically to avoid breaking drivers (we\n> > just move all the code between ident and tail into the attach hook),\n> > but any resource that is not needed for the identification phase and is\n> > tied to the NAND chip could/should be requested in the attach hook (the\n> > WP pin is such a resource). \n> \n> Ok, that makes completely sense and I agree with that approach! However,\n> it is not obvious when looking at the series.\n> \n> Can we mention that fact in the commit log, e.g. something like:\n> \n> \"To avoid breaking this patch converts the driver mechanically by just\n> moving all the code between ...ident and ..tail into the attach hook.\n> Ideally driver should request all resources tied to the NAND chip in the\n> attach hook.\"\n\nAs Boris said, the whole change was somehow mechanic, I already had a\nhard time understanding what each driver wanted to achieve between\nthose two functions, I did not dig any further as it was already very\ntime consuming. A cleanup of many drivers would be appreciated though.\n\nAs this would apply to the 30 patches of the series and because I\nalready merged all of them, I think I'll pass for this one, even if I\ncompletely agree with the request.\n\nThanks,\nMiquèl","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org\n\t(client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=bootlin.com","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"b1Yjhb15\"; \n\tdkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[IPv6:2607:7c80:54:e::133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 41cM515mqSz9s0R\n\tfor ;\n\tFri, 27 Jul 2018 18:07:17 +1000 (AEST)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux))\n\tid 1fixmE-0002gs-65; Fri, 27 Jul 2018 08:07:06 +0000","from mail.bootlin.com ([62.4.15.54])\n\tby bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux))\n\tid 1fixmB-0002fl-7d\n\tfor linux-mtd@lists.infradead.org; Fri, 27 Jul 2018 08:07:04 +0000","by mail.bootlin.com (Postfix, from userid 110)\n\tid 895152082B; Fri, 27 Jul 2018 10:06:51 +0200 (CEST)","from xps13 (AAubervilliers-681-1-89-120.w90-88.abo.wanadoo.fr\n\t[90.88.30.120])\n\tby mail.bootlin.com (Postfix) with ESMTPSA id 3487820618;\n\tFri, 27 Jul 2018 10:06:41 +0200 (CEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=3MmpzlwNT83R9ej4Qb6iI68I+KTdEoCqLSorUT9JYbw=;\n\tb=b1Yjhb15jNVLTM\n\tbr2QXrJJiOd9n5iuIP3KHaEdlaUgU0EL48xmWPyW1MkK+8xAWm3l8Wnjelr+KaL3kkpfAWIPPWpZH\n\tUStSFkG0ohfB0kG2EVHy38dy3ScIHGBk3t/GzIkJaDBiDwDaTnJoV/3FUJlXxzLmF7GVLsqVZCl2f\n\tNUOnnjmih9Anktd+2CmCUiYI/ThWX2zsc2YPPOs/oWJb9qF7rQWGE8sgqvoe0rHklbQ4zs/XYTL7W\n\tBSE8MsIFqLSWX4J70UqXl/y8NeWpAeGl8M/p0/ZJR5XadVuuuDexcqe7KuuZfXw0cNH7q0kfdCTzu\n\tFrEEmK8PS0Wp1rsI40iA==;","X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on mail.bootlin.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","Date":"Fri, 27 Jul 2018 10:06:40 +0200","From":"Miquel Raynal ","To":"Stefan Agner ","Subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","Message-ID":"<20180727100640.715d6cce@xps13>","In-Reply-To":"<81b38ddf26e981adf6a0564708d2954e@agner.ch>","References":"<20180725133152.30898-1-miquel.raynal@bootlin.com>\n\t<20180725133152.30898-13-miquel.raynal@bootlin.com>\n\t\n\t<20180726200120.0dd4bcb7@bbrezillon>\n\t<81b38ddf26e981adf6a0564708d2954e@agner.ch>","Organization":"Bootlin","X-Mailer":"Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu)","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20180727_010703_413737_C22D4D0D ","X-CRM114-Status":"GOOD ( 18.71 )","X-Spam-Score":"-0.0 (/)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-0.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [62.4.15.54 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Lucas Stach , Wenyou Yang ,\n\tMarek Vasut ,\n\tRichard Weinberger , \n\tBoris Brezillon ,\n\tlinux-mtd@lists.infradead.org, Josh Wu ,\n\tBrian Norris , \n\tDavid Woodhouse ","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"}},{"id":1962708,"web_url":"http://patchwork.ozlabs.org/comment/1962708/","msgid":"","list_archive_url":null,"date":"2018-07-27T08:33:29","subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","submitter":{"id":4137,"url":"http://patchwork.ozlabs.org/api/people/4137/","name":"Stefan Agner","email":"stefan@agner.ch"},"content":"On 27.07.2018 10:06, Miquel Raynal wrote:\n> Hi Stefan,\n> \n> Stefan Agner wrote on Fri, 27 Jul 2018 09:13:09 +0200:\n> \n>> On 26.07.2018 20:01, Boris Brezillon wrote:\n>> > On Thu, 26 Jul 2018 18:29:36 +0200\n>> > Stefan Agner wrote:\n>> >\n>> >> On 25.07.2018 15:31, Miquel Raynal wrote:\n>> >> > Two helpers have been added to the core to do all kind of controller\n>> >> > side configuration/initialization between the detection phase and the\n>> >> > final NAND scan. Implement these hooks so that we can convert the driver\n>> >> > to just use nand_scan() instead of the nand_scan_ident() +\n>> >> > nand_scan_tail() pair.\n>> >> >\n>> >>\n>> >> While the patch looks technically correct, I wonder whether the driver\n>> >> now does what we expect it from attach logically...\n>> >>\n>> >> E.g. shouldn't we get the wp_gpio in attach?\n>> >\n>> > Well, this series does things mechanically to avoid breaking drivers (we\n>> > just move all the code between ident and tail into the attach hook),\n>> > but any resource that is not needed for the identification phase and is\n>> > tied to the NAND chip could/should be requested in the attach hook (the\n>> > WP pin is such a resource).\n>>\n>> Ok, that makes completely sense and I agree with that approach! However,\n>> it is not obvious when looking at the series.\n>>\n>> Can we mention that fact in the commit log, e.g. something like:\n>>\n>> \"To avoid breaking this patch converts the driver mechanically by just\n>> moving all the code between ...ident and ..tail into the attach hook.\n>> Ideally driver should request all resources tied to the NAND chip in the\n>> attach hook.\"\n> \n> As Boris said, the whole change was somehow mechanic, I already had a\n> hard time understanding what each driver wanted to achieve between\n> those two functions, I did not dig any further as it was already very\n> time consuming. A cleanup of many drivers would be appreciated though.\n\nYeah sure, and your work is very much appreciated!\n\nUntil closer look and Boris' confirmation it really wasn't clear to me\nwhether things are on purpose the way they are or because this patch is\nseen as a first (mechanical) step...\n\n> \n> As this would apply to the 30 patches of the series and because I\n> already merged all of them, I think I'll pass for this one, even if I\n> completely agree with the request.\n\nOk, at least it is documented on the ML now :-)\n\n--\nStefan","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; spf=none (mailfrom)\n\tsmtp.mailfrom=lists.infradead.org\n\t(client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=agner.ch","ozlabs.org; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:\n\tSubject:To:From:Date:MIME-Version:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=zAME8BJh0ffrI6VEMXFF1D1eq11xcVK12gW8mJ0+NV4=;\n\tb=AJAYwPyQS74uJk\n\tiSVQHLS2HvVM0ECblEcsjn8rZq8Yg3q4MQN259daoszKVU11bgkUzVpwchQBj6SGVshfNbb2EoHk0\n\tAUk0DxCbDUZG+fKYOCYMuqTT0TjRmFQMUPoBPyHoIha7O+adVUEgjrq3oyYehSOxGeJq6QwyBKoxs\n\tgKZHO7vCmo13pspkxCpKmlr5Lj9drIFFCNCb+/LuH5g3UL6y4dzmon40fzu1Rlg5onfVTPhnM670a\n\taE2+UidHB5xyt2QvFX9R0JaIVruY26gLxsCfrBks7r4Ph7eDWEQmXrcsnCxd6R57MxC8sz0AyitrM\n\tAiwelPHdf6HCVjK6plAw==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim;\n\tt=1532680411;\n\th=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n\tto:to:cc:cc:mime-version:mime-version:content-type:content-type:\n\tcontent-transfer-encoding:content-transfer-encoding:\n\tin-reply-to:in-reply-to:references:references;\n\tbh=RCUfmQJdTGE8bRxay4JjVSix9bAzTpzY4RUW7u1grZk=;\n\tb=qRxI5K+fkCtCaF9N5n7XTSp/WjXIs96GN2Ndt8OxrXq4mYkm+nuTCWgPQsuolLX/EsxTQ/\n\td5XIrkICy3o1HzTkpNVj2e7UKmpefmwFIEQmwnPAzJ8bPB/TCXSZqXMlrakLugHgs63jz3\n\t0LF7WpFovb+zCF51fYpLMTLQDAjPALA="],"MIME-Version":"1.0","Date":"Fri, 27 Jul 2018 10:33:29 +0200","From":"Stefan Agner ","To":"Miquel Raynal ","Subject":"Re: [PATCH v5 12/17] mtd: rawnand: tegra: convert driver to\n\tnand_scan()","In-Reply-To":"<20180727100640.715d6cce@xps13>","References":"<20180725133152.30898-1-miquel.raynal@bootlin.com>\n\t<20180725133152.30898-13-miquel.raynal@bootlin.com>\n\t\n\t<20180726200120.0dd4bcb7@bbrezillon>\n\t<81b38ddf26e981adf6a0564708d2954e@agner.ch>\n\t<20180727100640.715d6cce@xps13>","Message-ID":"","X-Sender":"stefan@agner.ch","User-Agent":"Roundcube Webmail/1.3.4","X-Spamd-Result":"default: False [-0.10 / 15.00]; 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