[{"id":1961064,"web_url":"http://patchwork.ozlabs.org/comment/1961064/","msgid":"<20180725173420.34bb32db@bbrezillon>","list_archive_url":null,"date":"2018-07-25T15:34:20","subject":"Re: [PATCH v5 02/17] mtd: rawnand: cafe: convert driver to\n\tnand_scan()","submitter":{"id":73370,"url":"http://patchwork.ozlabs.org/api/people/73370/","name":"Boris Brezillon","email":"boris.brezillon@bootlin.com"},"content":"On Wed, 25 Jul 2018 15:31:37 +0200\nMiquel Raynal wrote:\n\n> Two helpers have been added to the core to do all kind of controller\n> side configuration/initialization between the detection phase and the\n> final NAND scan. Implement these hooks so that we can convert the driver\n> to just use nand_scan() instead of the nand_scan_ident() +\n> nand_scan_tail() pair.\n> \n> Signed-off-by: Miquel Raynal \n\nReviewed-by: Boris Brezillon \n\n> ---\n> drivers/mtd/nand/raw/cafe_nand.c | 135 ++++++++++++++++++++++-----------------\n> 1 file changed, 78 insertions(+), 57 deletions(-)\n> \n> diff --git a/drivers/mtd/nand/raw/cafe_nand.c b/drivers/mtd/nand/raw/cafe_nand.c\n> index ac0be933a490..1dbe43adcfe7 100644\n> --- a/drivers/mtd/nand/raw/cafe_nand.c\n> +++ b/drivers/mtd/nand/raw/cafe_nand.c\n> @@ -67,6 +67,7 @@ struct cafe_priv {\n> \tint nr_data;\n> \tint data_pos;\n> \tint page_addr;\n> +\tbool usedma;\n> \tdma_addr_t dmaaddr;\n> \tunsigned char *dmabuf;\n> };\n> @@ -121,7 +122,7 @@ static void cafe_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)\n> \tstruct nand_chip *chip = mtd_to_nand(mtd);\n> \tstruct cafe_priv *cafe = nand_get_controller_data(chip);\n> \n> -\tif (usedma)\n> +\tif (cafe->usedma)\n> \t\tmemcpy(cafe->dmabuf + cafe->datalen, buf, len);\n> \telse\n> \t\tmemcpy_toio(cafe->mmio + CAFE_NAND_WRITE_DATA + cafe->datalen, buf, len);\n> @@ -137,7 +138,7 @@ static void cafe_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)\n> \tstruct nand_chip *chip = mtd_to_nand(mtd);\n> \tstruct cafe_priv *cafe = nand_get_controller_data(chip);\n> \n> -\tif (usedma)\n> +\tif (cafe->usedma)\n> \t\tmemcpy(buf, cafe->dmabuf + cafe->datalen, len);\n> \telse\n> \t\tmemcpy_fromio(buf, cafe->mmio + CAFE_NAND_READ_DATA + cafe->datalen, len);\n> @@ -253,7 +254,7 @@ static void cafe_nand_cmdfunc(struct mtd_info *mtd, unsigned command,\n> \t/* NB: The datasheet lies -- we really should be subtracting 1 here */\n> \tcafe_writel(cafe, cafe->datalen, NAND_DATA_LEN);\n> \tcafe_writel(cafe, 0x90000000, NAND_IRQ);\n> -\tif (usedma && (ctl1 & (3<<25))) {\n> +\tif (cafe->usedma && (ctl1 & (3<<25))) {\n> \t\tuint32_t dmactl = 0xc0000000 + cafe->datalen;\n> \t\t/* If WR or RD bits set, set up DMA */\n> \t\tif (ctl1 & (1<<26)) {\n> @@ -593,6 +594,76 @@ static int cafe_mul(int x)\n> \treturn gf4096_mul(x, 0xe01);\n> }\n> \n> +static int cafe_nand_attach_chip(struct nand_chip *chip)\n> +{\n> +\tstruct mtd_info *mtd = nand_to_mtd(chip);\n> +\tstruct cafe_priv *cafe = nand_get_controller_data(chip);\n> +\tint err = 0;\n> +\n> +\tcafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112,\n> +\t\t\t\t\t &cafe->dmaaddr, GFP_KERNEL);\n> +\tif (!cafe->dmabuf)\n> +\t\treturn -ENOMEM;\n> +\n> +\t/* Set up DMA address */\n> +\tcafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);\n> +\tcafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);\n> +\n> +\tcafe_dev_dbg(&cafe->pdev->dev, \"Set DMA address to %x (virt %p)\\n\",\n> +\t\t cafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);\n> +\n> +\t/* Restore the DMA flag */\n> +\tcafe->usedma = usedma;\n> +\n> +\tcafe->ctl2 = BIT(27); /* Reed-Solomon ECC */\n> +\tif (mtd->writesize == 2048)\n> +\t\tcafe->ctl2 |= BIT(29); /* 2KiB page size */\n> +\n> +\t/* Set up ECC according to the type of chip we found */\n> +\tmtd_set_ooblayout(mtd, &cafe_ooblayout_ops);\n> +\tif (mtd->writesize == 2048) {\n> +\t\tcafe->nand.bbt_td = &cafe_bbt_main_descr_2048;\n> +\t\tcafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;\n> +\t} else if (mtd->writesize == 512) {\n> +\t\tcafe->nand.bbt_td = &cafe_bbt_main_descr_512;\n> +\t\tcafe->nand.bbt_md = &cafe_bbt_mirror_descr_512;\n> +\t} else {\n> +\t\tdev_warn(&cafe->pdev->dev,\n> +\t\t\t \"Unexpected NAND flash writesize %d. Aborting\\n\",\n> +\t\t\t mtd->writesize);\n> +\t\terr = -ENOTSUPP;\n> +\t\tgoto out_free_dma;\n> +\t}\n> +\n> +\tcafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;\n> +\tcafe->nand.ecc.size = mtd->writesize;\n> +\tcafe->nand.ecc.bytes = 14;\n> +\tcafe->nand.ecc.strength = 4;\n> +\tcafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel;\n> +\tcafe->nand.ecc.write_oob = cafe_nand_write_oob;\n> +\tcafe->nand.ecc.read_page = cafe_nand_read_page;\n> +\tcafe->nand.ecc.read_oob = cafe_nand_read_oob;\n> +\n> +\treturn 0;\n> +\n> + out_free_dma:\n> +\tdma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);\n> +\n> +\treturn err;\n> +}\n> +\n> +static void cafe_nand_detach_chip(struct nand_chip *chip)\n> +{\n> +\tstruct cafe_priv *cafe = nand_get_controller_data(chip);\n> +\n> +\tdma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);\n> +}\n> +\n> +static const struct nand_controller_ops cafe_nand_controller_ops = {\n> +\t.attach_chip = cafe_nand_attach_chip,\n> +\t.detach_chip = cafe_nand_detach_chip,\n> +};\n> +\n> static int cafe_nand_probe(struct pci_dev *pdev,\n> \t\t\t\t const struct pci_device_id *ent)\n> {\n> @@ -600,7 +671,6 @@ static int cafe_nand_probe(struct pci_dev *pdev,\n> \tstruct cafe_priv *cafe;\n> \tuint32_t ctrl;\n> \tint err = 0;\n> -\tint old_dma;\n> \n> \t/* Very old versions shared the same PCI ident for all three\n> \t functions on the chip. Verify the class too... */\n> @@ -708,62 +778,15 @@ static int cafe_nand_probe(struct pci_dev *pdev,\n> \t\tcafe_readl(cafe, GLOBAL_CTRL),\n> \t\tcafe_readl(cafe, GLOBAL_IRQ_MASK));\n> \n> -\t/* Do not use the DMA for the nand_scan_ident() */\n> -\told_dma = usedma;\n> -\tusedma = 0;\n> +\t/* Do not use the DMA during the NAND identification */\n> +\tcafe->usedma = 0;\n> \n> \t/* Scan to find existence of the device */\n> -\terr = nand_scan_ident(mtd, 2, NULL);\n> +\tcafe->nand.dummy_controller.ops = &cafe_nand_controller_ops;\n> +\terr = nand_scan(mtd, 2);\n> \tif (err)\n> \t\tgoto out_irq;\n> \n> -\tcafe->dmabuf = dma_alloc_coherent(&cafe->pdev->dev, 2112,\n> -\t\t\t\t\t &cafe->dmaaddr, GFP_KERNEL);\n> -\tif (!cafe->dmabuf) {\n> -\t\terr = -ENOMEM;\n> -\t\tgoto out_irq;\n> -\t}\n> -\n> -\t/* Set up DMA address */\n> -\tcafe_writel(cafe, lower_32_bits(cafe->dmaaddr), NAND_DMA_ADDR0);\n> -\tcafe_writel(cafe, upper_32_bits(cafe->dmaaddr), NAND_DMA_ADDR1);\n> -\n> -\tcafe_dev_dbg(&cafe->pdev->dev, \"Set DMA address to %x (virt %p)\\n\",\n> -\t\tcafe_readl(cafe, NAND_DMA_ADDR0), cafe->dmabuf);\n> -\n> -\t/* Restore the DMA flag */\n> -\tusedma = old_dma;\n> -\n> -\tcafe->ctl2 = 1<<27; /* Reed-Solomon ECC */\n> -\tif (mtd->writesize == 2048)\n> -\t\tcafe->ctl2 |= 1<<29; /* 2KiB page size */\n> -\n> -\t/* Set up ECC according to the type of chip we found */\n> -\tmtd_set_ooblayout(mtd, &cafe_ooblayout_ops);\n> -\tif (mtd->writesize == 2048) {\n> -\t\tcafe->nand.bbt_td = &cafe_bbt_main_descr_2048;\n> -\t\tcafe->nand.bbt_md = &cafe_bbt_mirror_descr_2048;\n> -\t} else if (mtd->writesize == 512) {\n> -\t\tcafe->nand.bbt_td = &cafe_bbt_main_descr_512;\n> -\t\tcafe->nand.bbt_md = &cafe_bbt_mirror_descr_512;\n> -\t} else {\n> -\t\tpr_warn(\"Unexpected NAND flash writesize %d. Aborting\\n\",\n> -\t\t\tmtd->writesize);\n> -\t\tgoto out_free_dma;\n> -\t}\n> -\tcafe->nand.ecc.mode = NAND_ECC_HW_SYNDROME;\n> -\tcafe->nand.ecc.size = mtd->writesize;\n> -\tcafe->nand.ecc.bytes = 14;\n> -\tcafe->nand.ecc.strength = 4;\n> -\tcafe->nand.ecc.write_page = cafe_nand_write_page_lowlevel;\n> -\tcafe->nand.ecc.write_oob = cafe_nand_write_oob;\n> -\tcafe->nand.ecc.read_page = cafe_nand_read_page;\n> -\tcafe->nand.ecc.read_oob = cafe_nand_read_oob;\n> -\n> -\terr = nand_scan_tail(mtd);\n> -\tif (err)\n> -\t\tgoto out_free_dma;\n> -\n> \tpci_set_drvdata(pdev, mtd);\n> \n> \tmtd->name = \"cafe_nand\";\n> @@ -775,8 +798,6 @@ static int cafe_nand_probe(struct pci_dev *pdev,\n> \n> out_cleanup_nand:\n> \tnand_cleanup(&cafe->nand);\n> - out_free_dma:\n> -\tdma_free_coherent(&cafe->pdev->dev, 2112, cafe->dmabuf, cafe->dmaaddr);\n> out_irq:\n> \t/* Disable NAND IRQ in global IRQ mask register */\n> \tcafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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