[{"id":1941915,"web_url":"http://patchwork.ozlabs.org/comment/1941915/","msgid":"<6f1978b4-4a84-f6f2-0b31-48ab03055948@nxp.com>","list_archive_url":null,"date":"2018-06-26T21:24:17","subject":"Re: [U-Boot] [PATCH v1 9/9] arm: dts: imx7: colibri: add raw NAND\n\tsupport","submitter":{"id":68316,"url":"http://patchwork.ozlabs.org/api/people/68316/","name":"Han Xu","email":"han.xu@nxp.com"},"content":"On 04/20/2018 10:53 AM, Stefan Agner wrote:\n> From: Stefan Agner \n> \n> Signed-off-by: Stefan Agner \n> ---\n> \n> arch/arm/dts/imx7-colibri.dts | 28 ++++++++++++++++++++++++++++\n> 1 file changed, 28 insertions(+)\n> \n> diff --git a/arch/arm/dts/imx7-colibri.dts b/arch/arm/dts/imx7-colibri.dts\n> index f6c21052ae..a3b5618b45 100644\n> --- a/arch/arm/dts/imx7-colibri.dts\n> +++ b/arch/arm/dts/imx7-colibri.dts\n> @@ -17,6 +17,15 @@\n> \t};\n> };\n> \n> +&gpmi {\n> +\tpinctrl-names = \"default\";\n> +\tpinctrl-0 = <&pinctrl_gpmi_nand>;\n> +\tfsl,use-minimum-ecc;\n\n\nenable minimum ecc may cause no backward compatible since previous \nimplementation use oob space for ecc as much as possible. May consider \nmention this in docs and don't enable it by default?\n\n\n> +\tnand-on-flash-bbt;\n> +\tnand-ecc-mode = \"hw\";\n> +\tstatus = \"okay\";\n> +};\n> +\n> &i2c1 {\n> \tpinctrl-names = \"default\", \"gpio\";\n> \tpinctrl-0 = <&pinctrl_i2c1>;\n> @@ -49,6 +58,25 @@\n> };\n> \n> &iomuxc {\n> +\tpinctrl_gpmi_nand: gpmi-nand-grp {\n> +\t\tfsl,pins = <\n> +\t\t\tMX7D_PAD_SD3_CLK__NAND_CLE\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_CMD__NAND_ALE\t\t0x71\n> +\t\t\tMX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B\t0x71\n> +\t\t\tMX7D_PAD_SAI1_TX_DATA__NAND_READY_B\t0x74\n> +\t\t\tMX7D_PAD_SD3_STROBE__NAND_RE_B\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_RESET_B__NAND_WE_B\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA0__NAND_DATA00\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA1__NAND_DATA01\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA2__NAND_DATA02\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA3__NAND_DATA03\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA4__NAND_DATA04\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA5__NAND_DATA05\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA6__NAND_DATA06\t\t0x71\n> +\t\t\tMX7D_PAD_SD3_DATA7__NAND_DATA07\t\t0x71\n> +\t\t>;\n> +\t};\n> +\n> \tpinctrl_i2c4: i2c4-grp {\n> \t\tfsl,pins = <\n> \t\t\tMX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA\t0x4000007f\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"GoTv+Epq\";\n\tdkim-atps=neutral","spf=none (sender IP is )\n\tsmtp.mailfrom=han.xu@nxp.com; "],"x-microsoft-antispam-message-info":"jcYx0WbVpEzz5o9m3vhW2zc5rU51otmApbeyDnvhG93cJrLlYDt5ya3c5s1d43c9w1q3nYKDKzIqBVIkdHqqcaBqRCsXy6ghuTCC5M3eeZRWcolln9AqwcxjqlZQy7OopgR+o6wdsHIU+CTBzF89TX1PDbVE+yX/fWol3r3tb2ik6YY6k7GBABM3izKxJ0bz9hQ2wFx46f49Lyln1jmxz2rSbolkRFh26sbSEOV72+v6UZz7Jg6LwMWPgPSa1fprEZWaH19j/g6RZtABvbD45LJ74K+1q4Rv3UwPftTUGuHgO0My0JKeSUdf9FrxtzjwwNA9pAeO5tAimrhZ8I6+5B7w8JsMPzPBPzow/aCpbls=","spamdiagnosticoutput":"1:99","spamdiagnosticmetadata":"NSPM","Content-ID":"<003CDCB2493C744A8B3BAF087EAEA0D8@eurprd04.prod.outlook.com>","MIME-Version":"1.0","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"2d06d396-003d-47c7-c177-08d5dbab2cdf","X-MS-Exchange-CrossTenant-originalarrivaltime":"26 Jun 2018 21:24:17.9523\n\t(UTC)","X-MS-Exchange-CrossTenant-fromentityheader":"Hosted","X-MS-Exchange-CrossTenant-id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"VI1PR0401MB2512","X-Mailman-Approved-At":"Wed, 27 Jun 2018 12:05:21 +0000","Cc":"\"marex@denx.de\" ,\n\tMarcel Ziswiler ,\n\tStefan Agner ,\n\tMax Krummenacher ","Subject":"Re: [U-Boot] [PATCH v1 9/9] arm: dts: imx7: colibri: add raw NAND\n\tsupport","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}},{"id":1942813,"web_url":"http://patchwork.ozlabs.org/comment/1942813/","msgid":"","list_archive_url":null,"date":"2018-06-28T07:26:24","subject":"Re: [U-Boot] [PATCH v1 9/9] arm: dts: imx7: colibri: add raw NAND\n\tsupport","submitter":{"id":4137,"url":"http://patchwork.ozlabs.org/api/people/4137/","name":"Stefan Agner","email":"stefan@agner.ch"},"content":"On 26.06.2018 23:24, Han Xu wrote:\n> On 04/20/2018 10:53 AM, Stefan Agner wrote:\n>> From: Stefan Agner \n>>\n>> Signed-off-by: Stefan Agner \n>> ---\n>>\n>> arch/arm/dts/imx7-colibri.dts | 28 ++++++++++++++++++++++++++++\n>> 1 file changed, 28 insertions(+)\n>>\n>> diff --git a/arch/arm/dts/imx7-colibri.dts b/arch/arm/dts/imx7-colibri.dts\n>> index f6c21052ae..a3b5618b45 100644\n>> --- a/arch/arm/dts/imx7-colibri.dts\n>> +++ b/arch/arm/dts/imx7-colibri.dts\n>> @@ -17,6 +17,15 @@\n>> \t};\n>> };\n>>\n>> +&gpmi {\n>> +\tpinctrl-names = \"default\";\n>> +\tpinctrl-0 = <&pinctrl_gpmi_nand>;\n>> +\tfsl,use-minimum-ecc;\n> \n> \n> enable minimum ecc may cause no backward compatible since previous \n> implementation use oob space for ecc as much as possible. May consider \n> mention this in docs and don't enable it by default?\n\nYes I am aware of that.\n\nUnfortunately, we ship already lots of products with downstream kernels.\nAnd those kernels seem to default to a behavior which is similar to\nmainlines \"fsl,use-minimum-ecc\". So with this change I only make sure\nthat upstream kernels work with the layout used in downstream\nU-Boot/Linux.\n\n--\nStefan\n\n> \n> \n>> +\tnand-on-flash-bbt;\n>> +\tnand-ecc-mode = \"hw\";\n>> +\tstatus = \"okay\";\n>> +};\n>> +\n>> &i2c1 {\n>> \tpinctrl-names = \"default\", \"gpio\";\n>> \tpinctrl-0 = <&pinctrl_i2c1>;\n>> @@ -49,6 +58,25 @@\n>> };\n>>\n>> &iomuxc {\n>> +\tpinctrl_gpmi_nand: gpmi-nand-grp {\n>> +\t\tfsl,pins = <\n>> +\t\t\tMX7D_PAD_SD3_CLK__NAND_CLE\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_CMD__NAND_ALE\t\t0x71\n>> +\t\t\tMX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B\t0x71\n>> +\t\t\tMX7D_PAD_SAI1_TX_DATA__NAND_READY_B\t0x74\n>> +\t\t\tMX7D_PAD_SD3_STROBE__NAND_RE_B\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_RESET_B__NAND_WE_B\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA0__NAND_DATA00\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA1__NAND_DATA01\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA2__NAND_DATA02\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA3__NAND_DATA03\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA4__NAND_DATA04\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA5__NAND_DATA05\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA6__NAND_DATA06\t\t0x71\n>> +\t\t\tMX7D_PAD_SD3_DATA7__NAND_DATA07\t\t0x71\n>> +\t\t>;\n>> +\t};\n>> +\n>> \tpinctrl_i2c4: i2c4-grp {\n>> \t\tfsl,pins = <\n>> \t\t\tMX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA\t0x4000007f\n>>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdmarc=none (p=none dis=none) header.from=agner.ch","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tsecure) header.d=agner.ch header.i=@agner.ch header.b=\"yWUyh9dT\";\n\tdkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 41GWYg1yCXz9ryk\n\tfor ;\n\tThu, 28 Jun 2018 17:26:45 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid AE4FEC21DA1; Thu, 28 Jun 2018 07:26:37 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 213F3C21C6A;\n\tThu, 28 Jun 2018 07:26:35 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 0BC8EC21C29; Thu, 28 Jun 2018 07:26:33 +0000 (UTC)","from mail.kmu-office.ch (mail.kmu-office.ch [178.209.48.109])\n\tby lists.denx.de (Postfix) with ESMTPS id 1AEACC21C4A\n\tfor ; Thu, 28 Jun 2018 07:26:32 +0000 (UTC)","from webmail.kmu-office.ch (unknown [IPv6:2a02:418:6a02::a3])\n\tby mail.kmu-office.ch (Postfix) with ESMTPSA id 39F9D5C0070;\n\tThu, 28 Jun 2018 09:26:29 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim;\n\tt=1530170789;\n\th=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n\tto:to:cc:cc:mime-version:mime-version:content-type:content-type:\n\tcontent-transfer-encoding:content-transfer-encoding:\n\tin-reply-to:in-reply-to:references:references;\n\tbh=o+DqEQJuKSfc6QPmoanHT7rsg7m/tsfFOgEHzTb4kgo=;\n\tb=yWUyh9dT1GM93B/FBmImTae8mvAliIlLK2p6+kN0xp7CFFHwgQov+rzLJYSj2OJLjyqQCa\n\tfWLFU/mGpuc62oy0+pUHS+PuYsP+tjwc/Rdw7LB6+2FHH2Jc4hnFBcKBATJKQFCLZ4GjSk\n\tiKyPGiLsK6kM1MqnWM0HgZ/jXGIw/lk=","MIME-Version":"1.0","Date":"Thu, 28 Jun 2018 09:26:24 +0200","From":"Stefan Agner ","To":"Han Xu ","In-Reply-To":"<6f1978b4-4a84-f6f2-0b31-48ab03055948@nxp.com>","References":"<20180420155314.8920-1-stefan@agner.ch>\n\t<20180420155314.8920-10-stefan@agner.ch>\n\t<6f1978b4-4a84-f6f2-0b31-48ab03055948@nxp.com>","Message-ID":"","X-Sender":"stefan@agner.ch","User-Agent":"Roundcube Webmail/1.3.4","X-Spamd-Result":"default: False [-3.10 / 15.00]; TO_MATCH_ENVRCPT_ALL(0.00)[];\n\tMID_RHS_MATCH_FROM(0.00)[]; MIME_GOOD(-0.10)[text/plain];\n\tFROM_HAS_DN(0.00)[]; RCPT_COUNT_SEVEN(0.00)[9];\n\tFROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[];\n\tTO_DN_SOME(0.00)[]; RCVD_COUNT_ZERO(0.00)[0];\n\tASN(0.00)[asn:29691, ipnet:2a02:418::/29, country:CH];\n\tRCVD_TLS_ALL(0.00)[]; BAYES_HAM(-3.00)[100.00%]; ARC_NA(0.00)[]","Cc":"marex@denx.de, Stefan Agner ,\n\tMarcel Ziswiler , oss@buserror.net,\n\tu-boot@lists.denx.de, Max Krummenacher ","Subject":"Re: [U-Boot] [PATCH v1 9/9] arm: dts: imx7: colibri: add raw NAND\n\tsupport","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "}}]