[{"id":1797767,"web_url":"http://patchwork.ozlabs.org/comment/1797767/","msgid":"","list_archive_url":null,"date":"2017-11-02T09:37:47","subject":"Re: [Qemu-devel] [PATCH] pc: restrict port92 register value to 2\n\tbits","submitter":{"id":2701,"url":"http://patchwork.ozlabs.org/api/people/2701/","name":"Paolo Bonzini","email":"pbonzini@redhat.com"},"content":"On 02/11/2017 10:36, P J P wrote:\n> From: Prasad J Pandit \n> \n> Port 92 configuration register holds an 8-bit value. Of 8-bits,\n> bits 0-1 are used and 2-7 are reserved. Restrict the supplied\n> value to 2 bits.\n\nThis patch is not necessary. \"Do nothing and just report back the value\nthat was written\" is an okay implementation of reserved bits.\n\nPaolo\n\n\n> Reported-by: Niu Guoxiang \n> Signed-off-by: Prasad J Pandit \n> ---\n> hw/i386/pc.c | 1 +\n> 1 file changed, 1 insertion(+)\n> \n> diff --git a/hw/i386/pc.c b/hw/i386/pc.c\n> index 05985d4927..883384a599 100644\n> --- a/hw/i386/pc.c\n> +++ b/hw/i386/pc.c\n> @@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,\n> Port92State *s = opaque;\n> int oldval = s->outport;\n> \n> + val &= 0x03;\n> DPRINTF(\"port92: write 0x%02\" PRIx64 \"\\n\", val);\n> s->outport = val;\n> qemu_set_irq(s->a20_out, (val >> 1) & 1);\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ext-mx07.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx07.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=pbonzini@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3ySKpb467Fz9s7c\n\tfor ;\n\tThu, 2 Nov 2017 20:41:11 +1100 (AEDT)","from localhost ([::1]:59383 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1eABzp-00019C-Hl\n\tfor incoming@patchwork.ozlabs.org; Thu, 02 Nov 2017 05:41:09 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:57814)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1eABwe-0008Ld-Kk\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 05:37:53 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1eABwd-0005BG-UD\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 05:37:52 -0400","from mx1.redhat.com ([209.132.183.28]:47318)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1eABwd-0005Ac-OS\n\tfor qemu-devel@nongnu.org; Thu, 02 Nov 2017 05:37:51 -0400","from smtp.corp.redhat.com\n\t(int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 45301C04AC4E;\n\tThu, 2 Nov 2017 09:37:50 +0000 (UTC)","from [10.36.117.152] (ovpn-117-152.ams2.redhat.com [10.36.117.152])\n\tby smtp.corp.redhat.com (Postfix) with ESMTPS id 1EE426061B;\n\tThu, 2 Nov 2017 09:37:48 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com 45301C04AC4E","To":"P J P , Qemu Developers ","References":"<20171102093625.32342-1-ppandit@redhat.com>","From":"Paolo Bonzini ","Message-ID":"","Date":"Thu, 2 Nov 2017 10:37:47 +0100","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.4.0","MIME-Version":"1.0","In-Reply-To":"<20171102093625.32342-1-ppandit@redhat.com>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.13","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.31]);\n\tThu, 02 Nov 2017 09:37:50 +0000 (UTC)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"Re: [Qemu-devel] [PATCH] pc: restrict port92 register value to 2\n\tbits","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Prasad J Pandit ,\n\tNiu Guoxiang ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"}},{"id":1797878,"web_url":"http://patchwork.ozlabs.org/comment/1797878/","msgid":"","list_archive_url":null,"date":"2017-11-02T12:25:15","subject":"Re: [Qemu-devel] [PATCH] pc: restrict port92 register value to 2\n\tbits","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"content":"Hi Prasad,\n\nOn 11/02/2017 06:37 AM, Paolo Bonzini wrote:\n> On 02/11/2017 10:36, P J P wrote:\n>> From: Prasad J Pandit \n>>\n>> Port 92 configuration register holds an 8-bit value. Of 8-bits,\n>> bits 0-1 are used and 2-7 are reserved. Restrict the supplied\n>> value to 2 bits.\n> \n> This patch is not necessary. \"Do nothing and just report back the value\n> that was written\" is an okay implementation of reserved bits.\n> \n> Paolo\n> \n> \n>> Reported-by: Niu Guoxiang \n>> Signed-off-by: Prasad J Pandit \n>> ---\n>> hw/i386/pc.c | 1 +\n>> 1 file changed, 1 insertion(+)\n>>\n>> diff --git a/hw/i386/pc.c b/hw/i386/pc.c\n>> index 05985d4927..883384a599 100644\n>> --- a/hw/i386/pc.c\n>> +++ b/hw/i386/pc.c\n>> @@ -515,6 +515,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,\n>> Port92State *s = opaque;\n>> int oldval = s->outport;\n>> \n>> + val &= 0x03;\n>> DPRINTF(\"port92: write 0x%02\" PRIx64 \"\\n\", val);\n\nYou might want to report a guest error instead:\n\n if (val & ~3) {\n qemu_log_mask(LOG_GUEST_ERROR,\n \"port92: bits 2-7 are reserved \"\n \"(wrote 0x%02\" PRIx64 \")\\n\", val);\n }\n\n>> s->outport = val;\n>> qemu_set_irq(s->a20_out, (val >> 1) & 1);","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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