[{"id":1795058,"web_url":"http://patchwork.ozlabs.org/comment/1795058/","msgid":"<87r2toiikt.fsf@linaro.org>","list_archive_url":null,"date":"2017-10-27T17:52:50","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin writes:\n\n> This patch adds two arm64-specific prctls, to permit userspace to\n> control its vector length:\n>\n> * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n> length inheritance mode.\n>\n> * PR_SVE_GET_VL: get the same information.\n>\n> Although these prctls resemble instruction set features in the SVE\n> architecture, they provide additional control: the vector length\n> inheritance mode is Linux-specific and nothing to do with the\n> architecture, and the architecture does not permit EL0 to set its\n> own vector length directly. Both can be used in portable tools\n> without requiring the use of SVE instructions.\n>\n> Signed-off-by: Dave Martin \n> Reviewed-by: Catalin Marinas \n> Cc: Alex Bennée \n\nFYI there is a minor conflict applying this on current master.\n\n>\n> ---\n>\n> **Dropped at v3** Reviewed-by: Alex Bennée \n> due to non-trivial changes/fixes after v2.\n>\n> Changes since v3\n> ----------------\n>\n> Requested by Catalin Marinas:\n>\n> * Replace static __maybe_unused functions with static inlines.\n>\n> (Retaining Catalin's Reviewed-by with his approval.)\n> ---\n> arch/arm64/include/asm/fpsimd.h | 14 +++++++++++\n> arch/arm64/include/asm/processor.h | 4 +++\n> arch/arm64/kernel/fpsimd.c | 50 ++++++++++++++++++++++++++++++++++++++\n> include/uapi/linux/prctl.h | 4 +++\n> kernel/sys.c | 12 +++++++++\n> 5 files changed, 84 insertions(+)\n>\n> diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h\n> index d754e5a..b868412 100644\n> --- a/arch/arm64/include/asm/fpsimd.h\n> +++ b/arch/arm64/include/asm/fpsimd.h\n> @@ -17,6 +17,7 @@\n> #define __ASM_FP_H\n>\n> #include \n> +#include \n>\n> #ifndef __ASSEMBLY__\n>\n> @@ -98,6 +99,9 @@ extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);\n> extern int sve_set_vector_length(struct task_struct *task,\n> \t\t\t\t unsigned long vl, unsigned long flags);\n>\n> +extern int sve_set_current_vl(unsigned long arg);\n> +extern int sve_get_current_vl(void);\n> +\n> /*\n> * Probing and setup functions.\n> * Calls to these functions must be serialised with one another.\n> @@ -114,6 +118,16 @@ static inline void fpsimd_release_task(struct task_struct *task) { }\n> static inline void sve_sync_to_fpsimd(struct task_struct *task) { }\n> static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }\n>\n> +static inline int sve_set_current_vl(unsigned long arg)\n> +{\n> +\treturn -EINVAL;\n> +}\n> +\n> +static inline int sve_get_current_vl(void)\n> +{\n> +\treturn -EINVAL;\n> +}\n> +\n> static inline void sve_init_vq_map(void) { }\n> static inline void sve_update_vq_map(void) { }\n> static inline int sve_verify_vq_map(void) { return 0; }\n> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h\n> index c6fddb0..023cacb 100644\n> --- a/arch/arm64/include/asm/processor.h\n> +++ b/arch/arm64/include/asm/processor.h\n> @@ -217,5 +217,9 @@ static inline void spin_lock_prefetch(const void *ptr)\n> int cpu_enable_pan(void *__unused);\n> int cpu_enable_cache_maint_trap(void *__unused);\n>\n> +/* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */\n> +#define SVE_SET_VL(arg)\tsve_set_current_vl(arg)\n> +#define SVE_GET_VL()\tsve_get_current_vl()\n> +\n> #endif /* __ASSEMBLY__ */\n> #endif /* __ASM_PROCESSOR_H */\n> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\n> index a47ce44..7465622 100644\n> --- a/arch/arm64/kernel/fpsimd.c\n> +++ b/arch/arm64/kernel/fpsimd.c\n> @@ -28,6 +28,7 @@\n> #include \n> #include \n> #include \n> +#include \n> #include \n> #include \n> #include \n> @@ -557,6 +558,55 @@ int sve_set_vector_length(struct task_struct *task,\n> }\n>\n> /*\n> + * Encode the current vector length and flags for return.\n> + * This is only required for prctl(): ptrace has separate fields\n> + *\n> + * flags are as for sve_set_vector_length().\n> + */\n> +static int sve_prctl_status(unsigned long flags)\n> +{\n> +\tint ret;\n> +\n> +\tif (flags & PR_SVE_SET_VL_ONEXEC)\n> +\t\tret = current->thread.sve_vl_onexec;\n> +\telse\n> +\t\tret = current->thread.sve_vl;\n> +\n> +\tif (test_thread_flag(TIF_SVE_VL_INHERIT))\n> +\t\tret |= PR_SVE_VL_INHERIT;\n> +\n> +\treturn ret;\n> +}\n> +\n> +/* PR_SVE_SET_VL */\n> +int sve_set_current_vl(unsigned long arg)\n> +{\n> +\tunsigned long vl, flags;\n> +\tint ret;\n> +\n> +\tvl = arg & PR_SVE_VL_LEN_MASK;\n> +\tflags = arg & ~vl;\n> +\n> +\tif (!system_supports_sve())\n> +\t\treturn -EINVAL;\n> +\n> +\tret = sve_set_vector_length(current, vl, flags);\n> +\tif (ret)\n> +\t\treturn ret;\n> +\n> +\treturn sve_prctl_status(flags);\n> +}\n> +\n> +/* PR_SVE_GET_VL */\n> +int sve_get_current_vl(void)\n> +{\n> +\tif (!system_supports_sve())\n> +\t\treturn -EINVAL;\n> +\n> +\treturn sve_prctl_status(0);\n> +}\n> +\n> +/*\n> * Bitmap for temporary storage of the per-CPU set of supported vector lengths\n> * during secondary boot.\n> */\n> diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h\n> index 1b64901..1ef9370 100644\n> --- a/include/uapi/linux/prctl.h\n> +++ b/include/uapi/linux/prctl.h\n> @@ -198,7 +198,11 @@ struct prctl_mm_map {\n> # define PR_CAP_AMBIENT_CLEAR_ALL\t4\n>\n> /* arm64 Scalable Vector Extension controls */\n> +/* Flag values must be kept in sync with ptrace NT_ARM_SVE interface */\n> +#define PR_SVE_SET_VL\t\t\t48\t/* set task vector length */\n> # define PR_SVE_SET_VL_ONEXEC\t\t(1 << 18) /* defer effect until exec */\n> +#define PR_SVE_GET_VL\t\t\t49\t/* get task vector length */\n> +/* Bits common to PR_SVE_SET_VL and PR_SVE_GET_VL */\n> # define PR_SVE_VL_LEN_MASK\t\t0xffff\n> # define PR_SVE_VL_INHERIT\t\t(1 << 17) /* inherit across exec */\n>\n> diff --git a/kernel/sys.c b/kernel/sys.c\n> index 9aebc29..c541916 100644\n> --- a/kernel/sys.c\n> +++ b/kernel/sys.c\n> @@ -110,6 +110,12 @@\n> #ifndef SET_FP_MODE\n> # define SET_FP_MODE(a,b)\t(-EINVAL)\n> #endif\n> +#ifndef SVE_SET_VL\n> +# define SVE_SET_VL(a)\t\t(-EINVAL)\n> +#endif\n> +#ifndef SVE_GET_VL\n> +# define SVE_GET_VL()\t\t(-EINVAL)\n> +#endif\n>\n> /*\n> * this is where the system-wide overflow UID and GID are defined, for\n> @@ -2385,6 +2391,12 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,\n> \tcase PR_GET_FP_MODE:\n> \t\terror = GET_FP_MODE(me);\n> \t\tbreak;\n> +\tcase PR_SVE_SET_VL:\n> +\t\terror = SVE_SET_VL(arg2);\n> +\t\tbreak;\n> +\tcase PR_SVE_GET_VL:\n> +\t\terror = SVE_GET_VL();\n> +\t\tbreak;\n> \tdefault:\n> \t\terror = -EINVAL;\n> \t\tbreak;\n\n\n--\nAlex Bennée","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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emacs 26.0.90","From":"Alex =?utf-8?q?Benn=C3=A9e?= ","To":"Dave Martin ","Subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","In-reply-to":"<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>","Date":"Fri, 27 Oct 2017 18:52:50 +0100","Message-ID":"<87r2toiikt.fsf@linaro.org>","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171027_105315_431219_C08FC343 ","X-CRM114-Status":"GOOD ( 23.15 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:242 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, Okamoto Takayuki , \n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon , \n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1795294,"web_url":"http://patchwork.ozlabs.org/comment/1795294/","msgid":"<20171028160506.GI19485@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-28T16:05:09","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:\n> \n> Dave Martin writes:\n> \n> > This patch adds two arm64-specific prctls, to permit userspace to\n> > control its vector length:\n> >\n> > * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n> > length inheritance mode.\n> >\n> > * PR_SVE_GET_VL: get the same information.\n> >\n> > Although these prctls resemble instruction set features in the SVE\n> > architecture, they provide additional control: the vector length\n> > inheritance mode is Linux-specific and nothing to do with the\n> > architecture, and the architecture does not permit EL0 to set its\n> > own vector length directly. Both can be used in portable tools\n> > without requiring the use of SVE instructions.\n> >\n> > Signed-off-by: Dave Martin \n> > Reviewed-by: Catalin Marinas \n> > Cc: Alex Bennée \n> \n> FYI there is a minor conflict applying this on current master.\n\nThere are some trivial conflicts with one or two patches that already\nwent into arm64/for-next/core, so I based on that for this posting, not\ntorvalds/master.\n\nThere's a note in the cover letter giving the precise commit I based\non, though the branch doesn't seem to have moved yet since I posted.\n\nOtherwise, I don't see any conflict -- can you give details?\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; 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Sat, 28 Oct 2017 09:05:11 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:\n\tMessage-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=a/ZG46+bBSbWriIiSOLy8ttYwf3cO9t2rn7AH5iKDrs=;\n\tb=LWJgoD1ZTFtmim\n\tVPya0KDFF+UP3d3uekSt1nHYKvstNFcUQg+WTi+O+iTh4Lpy4zvuFZZNBwvLH460QbmTy5BbcyJAP\n\tSGdtMFnuXyYuL1cIiRbxd+WliBRgzTvcG4PCOixjBUeqvQR2wQqQSRYAppdxge1EQEhJKPDqLRaJt\n\tJYiRxIsu6Y/2eswx91wJPwpFqQ8ULlHB6a4f3hgd2Y0yNsNS1J1rXki2QA3uHZmZWRXQexm45ytfK\n\t3QlDOklA8QbCrYw7c3Rs8a/MSJ40XMhZtEViVPmTvLWVpt88qJ5T29mBao0MjM2dvV3qIAZn9w8c/\n\txDnNdAvlmO/7GDgZEr8Q==;","Date":"Sat, 28 Oct 2017 17:05:09 +0100","From":"Dave Martin ","To":"Alex =?iso-8859-1?q?Benn=E9e?= ","Subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","Message-ID":"<20171028160506.GI19485@e103592.cambridge.arm.com>","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>\n\t<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>\n\t<87r2toiikt.fsf@linaro.org>","MIME-Version":"1.0","Content-Disposition":"inline","In-Reply-To":"<87r2toiikt.fsf@linaro.org>","User-Agent":"Mutt/1.5.23 (2014-03-12)","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171028_090535_598743_505C74F0 ","X-CRM114-Status":"GOOD ( 14.73 )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, Okamoto Takayuki , \n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon , \n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"iso-8859-1\"","Content-Transfer-Encoding":"quoted-printable","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1796070,"web_url":"http://patchwork.ozlabs.org/comment/1796070/","msgid":"<87fua07gyq.fsf@linaro.org>","list_archive_url":null,"date":"2017-10-30T16:12:13","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin writes:\n\n> On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:\n>>\n>> Dave Martin writes:\n>>\n>> > This patch adds two arm64-specific prctls, to permit userspace to\n>> > control its vector length:\n>> >\n>> > * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n>> > length inheritance mode.\n>> >\n>> > * PR_SVE_GET_VL: get the same information.\n>> >\n>> > Although these prctls resemble instruction set features in the SVE\n>> > architecture, they provide additional control: the vector length\n>> > inheritance mode is Linux-specific and nothing to do with the\n>> > architecture, and the architecture does not permit EL0 to set its\n>> > own vector length directly. Both can be used in portable tools\n>> > without requiring the use of SVE instructions.\n>> >\n>> > Signed-off-by: Dave Martin \n>> > Reviewed-by: Catalin Marinas \n>> > Cc: Alex Bennée \n>>\n>> FYI there is a minor conflict applying this on current master.\n>\n> There are some trivial conflicts with one or two patches that already\n> went into arm64/for-next/core, so I based on that for this posting, not\n> torvalds/master.\n>\n> There's a note in the cover letter giving the precise commit I based\n> on, though the branch doesn't seem to have moved yet since I posted.\n\nAhh probably those. It was only a few header file shuffles. I was\nrushing to apply before my flight back I failed to note the change in\nbase commit.\n\n>\n> Otherwise, I don't see any conflict -- can you give details?\n\nOnly that #endif _ASM_ had been dropped from the header file.\n\n>\n> Cheers\n> ---Dave\n\n\n--\nAlex Bennée","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org header.b=\"kaPuHTpC\"; \n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=linaro.org header.i=@linaro.org\n\theader.b=\"R4fidWb2\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yQfdt2NpQz9sRg\n\tfor ;\n\tTue, 31 Oct 2017 03:12:50 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e9Cg9-00036f-Ob; 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\n\tMon, 30 Oct 2017 09:12:15 -0700 (PDT)","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>\n\t<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>\n\t<87r2toiikt.fsf@linaro.org>\n\t<20171028160506.GI19485@e103592.cambridge.arm.com>","User-agent":"mu4e 1.0-alpha0; emacs 26.0.90","From":"Alex =?utf-8?q?Benn=C3=A9e?= ","To":"Dave Martin ","Subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","In-reply-to":"<20171028160506.GI19485@e103592.cambridge.arm.com>","Date":"Mon, 30 Oct 2017 16:12:13 +0000","Message-ID":"<87fua07gyq.fsf@linaro.org>","MIME-Version":"1.0","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20171030_091238_567913_D17EBADF ","X-CRM114-Status":"GOOD ( 16.92 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno\n\ttrust [2a00:1450:400c:c0c:0:0:0:244 listed in] [list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-arm-kernel@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"linux-arch@vger.kernel.org, Okamoto Takayuki , \n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon , \n\tkvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Sender":"\"linux-arm-kernel\" ","Errors-To":"linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org","List-Id":"linux-imx-kernel.lists.patchwork.ozlabs.org"}},{"id":1796076,"web_url":"http://patchwork.ozlabs.org/comment/1796076/","msgid":"<20171030161709.GJ19485@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-30T16:17:22","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Mon, Oct 30, 2017 at 04:12:13PM +0000, Alex Bennée wrote:\n> \n> Dave Martin writes:\n> \n> > On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:\n> >>\n> >> Dave Martin writes:\n> >>\n> >> > This patch adds two arm64-specific prctls, to permit userspace to\n> >> > control its vector length:\n> >> >\n> >> > * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n> >> > length inheritance mode.\n> >> >\n> >> > * PR_SVE_GET_VL: get the same information.\n> >> >\n> >> > Although these prctls resemble instruction set features in the SVE\n> >> > architecture, they provide additional control: the vector length\n> >> > inheritance mode is Linux-specific and nothing to do with the\n> >> > architecture, and the architecture does not permit EL0 to set its\n> >> > own vector length directly. Both can be used in portable tools\n> >> > without requiring the use of SVE instructions.\n> >> >\n> >> > Signed-off-by: Dave Martin \n> >> > Reviewed-by: Catalin Marinas \n> >> > Cc: Alex Bennée \n> >>\n> >> FYI there is a minor conflict applying this on current master.\n> >\n> > There are some trivial conflicts with one or two patches that already\n> > went into arm64/for-next/core, so I based on that for this posting, not\n> > torvalds/master.\n> >\n> > There's a note in the cover letter giving the precise commit I based\n> > on, though the branch doesn't seem to have moved yet since I posted.\n> \n> Ahh probably those. It was only a few header file shuffles. I was\n> rushing to apply before my flight back I failed to note the change in\n> base commit.\n> \n> >\n> > Otherwise, I don't see any conflict -- can you give details?\n> \n> Only that #endif _ASM_ had been dropped from the header file.\n\nThe #ifndef __ASSEMBLY__ ... #endif is added by another in-flight patch,\nso it depends on whether that patch (from arm64/for-next/core) is already\napplied.\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming-imx@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-imx@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"SnpfgodZ\"; dkim-atps=neutral"],"Received":["from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yQflh39W4z9s7F\n\tfor ;\n\tTue, 31 Oct 2017 03:17:52 +1100 (AEDT)","from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1e9Cl4-0006As-PV; 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