[{"id":1795057,"web_url":"http://patchwork.ozlabs.org/comment/1795057/","msgid":"<87r2toiikt.fsf@linaro.org>","list_archive_url":null,"date":"2017-10-27T17:52:50","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin writes:\n\n> This patch adds two arm64-specific prctls, to permit userspace to\n> control its vector length:\n>\n> * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n> length inheritance mode.\n>\n> * PR_SVE_GET_VL: get the same information.\n>\n> Although these prctls resemble instruction set features in the SVE\n> architecture, they provide additional control: the vector length\n> inheritance mode is Linux-specific and nothing to do with the\n> architecture, and the architecture does not permit EL0 to set its\n> own vector length directly. Both can be used in portable tools\n> without requiring the use of SVE instructions.\n>\n> Signed-off-by: Dave Martin \n> Reviewed-by: Catalin Marinas \n> Cc: Alex Bennée \n\nFYI there is a minor conflict applying this on current master.\n\n>\n> ---\n>\n> **Dropped at v3** Reviewed-by: Alex Bennée \n> due to non-trivial changes/fixes after v2.\n>\n> Changes since v3\n> ----------------\n>\n> Requested by Catalin Marinas:\n>\n> * Replace static __maybe_unused functions with static inlines.\n>\n> (Retaining Catalin's Reviewed-by with his approval.)\n> ---\n> arch/arm64/include/asm/fpsimd.h | 14 +++++++++++\n> arch/arm64/include/asm/processor.h | 4 +++\n> arch/arm64/kernel/fpsimd.c | 50 ++++++++++++++++++++++++++++++++++++++\n> include/uapi/linux/prctl.h | 4 +++\n> kernel/sys.c | 12 +++++++++\n> 5 files changed, 84 insertions(+)\n>\n> diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h\n> index d754e5a..b868412 100644\n> --- a/arch/arm64/include/asm/fpsimd.h\n> +++ b/arch/arm64/include/asm/fpsimd.h\n> @@ -17,6 +17,7 @@\n> #define __ASM_FP_H\n>\n> #include \n> +#include \n>\n> #ifndef __ASSEMBLY__\n>\n> @@ -98,6 +99,9 @@ extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);\n> extern int sve_set_vector_length(struct task_struct *task,\n> \t\t\t\t unsigned long vl, unsigned long flags);\n>\n> +extern int sve_set_current_vl(unsigned long arg);\n> +extern int sve_get_current_vl(void);\n> +\n> /*\n> * Probing and setup functions.\n> * Calls to these functions must be serialised with one another.\n> @@ -114,6 +118,16 @@ static inline void fpsimd_release_task(struct task_struct *task) { }\n> static inline void sve_sync_to_fpsimd(struct task_struct *task) { }\n> static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }\n>\n> +static inline int sve_set_current_vl(unsigned long arg)\n> +{\n> +\treturn -EINVAL;\n> +}\n> +\n> +static inline int sve_get_current_vl(void)\n> +{\n> +\treturn -EINVAL;\n> +}\n> +\n> static inline void sve_init_vq_map(void) { }\n> static inline void sve_update_vq_map(void) { }\n> static inline int sve_verify_vq_map(void) { return 0; }\n> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h\n> index c6fddb0..023cacb 100644\n> --- a/arch/arm64/include/asm/processor.h\n> +++ b/arch/arm64/include/asm/processor.h\n> @@ -217,5 +217,9 @@ static inline void spin_lock_prefetch(const void *ptr)\n> int cpu_enable_pan(void *__unused);\n> int cpu_enable_cache_maint_trap(void *__unused);\n>\n> +/* Userspace interface for PR_SVE_{SET,GET}_VL prctl()s: */\n> +#define SVE_SET_VL(arg)\tsve_set_current_vl(arg)\n> +#define SVE_GET_VL()\tsve_get_current_vl()\n> +\n> #endif /* __ASSEMBLY__ */\n> #endif /* __ASM_PROCESSOR_H */\n> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c\n> index a47ce44..7465622 100644\n> --- a/arch/arm64/kernel/fpsimd.c\n> +++ b/arch/arm64/kernel/fpsimd.c\n> @@ -28,6 +28,7 @@\n> #include \n> #include \n> #include \n> +#include \n> #include \n> #include \n> #include \n> @@ -557,6 +558,55 @@ int sve_set_vector_length(struct task_struct *task,\n> }\n>\n> /*\n> + * Encode the current vector length and flags for return.\n> + * This is only required for prctl(): ptrace has separate fields\n> + *\n> + * flags are as for sve_set_vector_length().\n> + */\n> +static int sve_prctl_status(unsigned long flags)\n> +{\n> +\tint ret;\n> +\n> +\tif (flags & PR_SVE_SET_VL_ONEXEC)\n> +\t\tret = current->thread.sve_vl_onexec;\n> +\telse\n> +\t\tret = current->thread.sve_vl;\n> +\n> +\tif (test_thread_flag(TIF_SVE_VL_INHERIT))\n> +\t\tret |= PR_SVE_VL_INHERIT;\n> +\n> +\treturn ret;\n> +}\n> +\n> +/* PR_SVE_SET_VL */\n> +int sve_set_current_vl(unsigned long arg)\n> +{\n> +\tunsigned long vl, flags;\n> +\tint ret;\n> +\n> +\tvl = arg & PR_SVE_VL_LEN_MASK;\n> +\tflags = arg & ~vl;\n> +\n> +\tif (!system_supports_sve())\n> +\t\treturn -EINVAL;\n> +\n> +\tret = sve_set_vector_length(current, vl, flags);\n> +\tif (ret)\n> +\t\treturn ret;\n> +\n> +\treturn sve_prctl_status(flags);\n> +}\n> +\n> +/* PR_SVE_GET_VL */\n> +int sve_get_current_vl(void)\n> +{\n> +\tif (!system_supports_sve())\n> +\t\treturn -EINVAL;\n> +\n> +\treturn sve_prctl_status(0);\n> +}\n> +\n> +/*\n> * Bitmap for temporary storage of the per-CPU set of supported vector lengths\n> * during secondary boot.\n> */\n> diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h\n> index 1b64901..1ef9370 100644\n> --- a/include/uapi/linux/prctl.h\n> +++ b/include/uapi/linux/prctl.h\n> @@ -198,7 +198,11 @@ struct prctl_mm_map {\n> # define PR_CAP_AMBIENT_CLEAR_ALL\t4\n>\n> /* arm64 Scalable Vector Extension controls */\n> +/* Flag values must be kept in sync with ptrace NT_ARM_SVE interface */\n> +#define PR_SVE_SET_VL\t\t\t48\t/* set task vector length */\n> # define PR_SVE_SET_VL_ONEXEC\t\t(1 << 18) /* defer effect until exec */\n> +#define PR_SVE_GET_VL\t\t\t49\t/* get task vector length */\n> +/* Bits common to PR_SVE_SET_VL and PR_SVE_GET_VL */\n> # define PR_SVE_VL_LEN_MASK\t\t0xffff\n> # define PR_SVE_VL_INHERIT\t\t(1 << 17) /* inherit across exec */\n>\n> diff --git a/kernel/sys.c b/kernel/sys.c\n> index 9aebc29..c541916 100644\n> --- a/kernel/sys.c\n> +++ b/kernel/sys.c\n> @@ -110,6 +110,12 @@\n> #ifndef SET_FP_MODE\n> # define SET_FP_MODE(a,b)\t(-EINVAL)\n> #endif\n> +#ifndef SVE_SET_VL\n> +# define SVE_SET_VL(a)\t\t(-EINVAL)\n> +#endif\n> +#ifndef SVE_GET_VL\n> +# define SVE_GET_VL()\t\t(-EINVAL)\n> +#endif\n>\n> /*\n> * this is where the system-wide overflow UID and GID are defined, for\n> @@ -2385,6 +2391,12 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,\n> \tcase PR_GET_FP_MODE:\n> \t\terror = GET_FP_MODE(me);\n> \t\tbreak;\n> +\tcase PR_SVE_SET_VL:\n> +\t\terror = SVE_SET_VL(arg2);\n> +\t\tbreak;\n> +\tcase PR_SVE_GET_VL:\n> +\t\terror = SVE_GET_VL();\n> +\t\tbreak;\n> \tdefault:\n> \t\terror = -EINVAL;\n> \t\tbreak;\n\n\n--\nAlex Bennée","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; 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emacs 26.0.90","From":"Alex =?utf-8?q?Benn=C3=A9e?= ","To":"Dave Martin ","Cc":"linux-arm-kernel@lists.infradead.org,\n\tCatalin Marinas ,\n\tWill Deacon ,\n\tArd Biesheuvel ,\n\tSzabolcs Nagy ,\n\tOkamoto Takayuki ,\n\tkvmarm@lists.cs.columbia.edu, libc-alpha@sourceware.org,\n\tlinux-arch@vger.kernel.org","Subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","In-reply-to":"<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>","Date":"Fri, 27 Oct 2017 18:52:50 +0100","Message-ID":"<87r2toiikt.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"quoted-printable"}},{"id":1795293,"web_url":"http://patchwork.ozlabs.org/comment/1795293/","msgid":"<20171028160506.GI19485@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-28T16:05:09","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:\n> \n> Dave Martin writes:\n> \n> > This patch adds two arm64-specific prctls, to permit userspace to\n> > control its vector length:\n> >\n> > * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n> > length inheritance mode.\n> >\n> > * PR_SVE_GET_VL: get the same information.\n> >\n> > Although these prctls resemble instruction set features in the SVE\n> > architecture, they provide additional control: the vector length\n> > inheritance mode is Linux-specific and nothing to do with the\n> > architecture, and the architecture does not permit EL0 to set its\n> > own vector length directly. Both can be used in portable tools\n> > without requiring the use of SVE instructions.\n> >\n> > Signed-off-by: Dave Martin \n> > Reviewed-by: Catalin Marinas \n> > Cc: Alex Bennée \n> \n> FYI there is a minor conflict applying this on current master.\n\nThere are some trivial conflicts with one or two patches that already\nwent into arm64/for-next/core, so I based on that for this posting, not\ntorvalds/master.\n\nThere's a note in the cover letter giving the precise commit I based\non, though the branch doesn't seem to have moved yet since I posted.\n\nOtherwise, I don't see any conflict -- can you give details?\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-86507-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; 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a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=l06GaRp/MGz/vWgaTZ9Ho/1KZvs=; b=W90N\n\tCiOms3VqipQwMTn9cb1vta72DkHf2WUbEsqaw3pot+eysAu2KDx9av94rnpMXbkC\n\tjD8gGx2Wb1Bfra79mT7eAr61ZIl/vImq9oWaEvUjKyTreULYx4FO4heflk1Gqci5\n\tWdiiJ09HwgxPnMVnNoKfKRxljpn7M+kgaatEiT0=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=letter","X-HELO":"foss.arm.com","Date":"Sat, 28 Oct 2017 17:05:09 +0100","From":"Dave Martin ","To":"Alex =?iso-8859-1?q?Benn=E9e?= ","Cc":"linux-arch@vger.kernel.org, Okamoto Takayuki , \n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon , kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","Message-ID":"<20171028160506.GI19485@e103592.cambridge.arm.com>","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>\n\t<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>\n\t<87r2toiikt.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<87r2toiikt.fsf@linaro.org>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}},{"id":1796069,"web_url":"http://patchwork.ozlabs.org/comment/1796069/","msgid":"<87fua07gyq.fsf@linaro.org>","list_archive_url":null,"date":"2017-10-30T16:12:13","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/people/39532/","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"content":"Dave Martin writes:\n\n> On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:\n>>\n>> Dave Martin writes:\n>>\n>> > This patch adds two arm64-specific prctls, to permit userspace to\n>> > control its vector length:\n>> >\n>> > * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n>> > length inheritance mode.\n>> >\n>> > * PR_SVE_GET_VL: get the same information.\n>> >\n>> > Although these prctls resemble instruction set features in the SVE\n>> > architecture, they provide additional control: the vector length\n>> > inheritance mode is Linux-specific and nothing to do with the\n>> > architecture, and the architecture does not permit EL0 to set its\n>> > own vector length directly. Both can be used in portable tools\n>> > without requiring the use of SVE instructions.\n>> >\n>> > Signed-off-by: Dave Martin \n>> > Reviewed-by: Catalin Marinas \n>> > Cc: Alex Bennée \n>>\n>> FYI there is a minor conflict applying this on current master.\n>\n> There are some trivial conflicts with one or two patches that already\n> went into arm64/for-next/core, so I based on that for this posting, not\n> torvalds/master.\n>\n> There's a note in the cover letter giving the precise commit I based\n> on, though the branch doesn't seem to have moved yet since I posted.\n\nAhh probably those. It was only a few header file shuffles. I was\nrushing to apply before my flight back I failed to note the change in\nbase commit.\n\n>\n> Otherwise, I don't see any conflict -- can you give details?\n\nOnly that #endif _ASM_ had been dropped from the header file.\n\n>\n> Cheers\n> ---Dave\n\n\n--\nAlex Bennée","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-86544-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"L/sv+Zev\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yQfdP2sxzz9sRg\n\tfor ;\n\tTue, 31 Oct 2017 03:12:25 +1100 (AEDT)","(qmail 87970 invoked by alias); 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\n\tMon, 30 Oct 2017 09:12:15 -0700 (PDT)","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>\n\t<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>\n\t<87r2toiikt.fsf@linaro.org>\n\t<20171028160506.GI19485@e103592.cambridge.arm.com>","User-agent":"mu4e 1.0-alpha0; emacs 26.0.90","From":"Alex =?utf-8?q?Benn=C3=A9e?= ","To":"Dave Martin ","Cc":"linux-arch@vger.kernel.org, Okamoto Takayuki ,\n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon , kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","In-reply-to":"<20171028160506.GI19485@e103592.cambridge.arm.com>","Date":"Mon, 30 Oct 2017 16:12:13 +0000","Message-ID":"<87fua07gyq.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=utf-8","Content-Transfer-Encoding":"quoted-printable"}},{"id":1796074,"web_url":"http://patchwork.ozlabs.org/comment/1796074/","msgid":"<20171030161709.GJ19485@e103592.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-30T16:17:22","subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","submitter":{"id":26612,"url":"http://patchwork.ozlabs.org/api/people/26612/","name":"Dave Martin","email":"Dave.Martin@arm.com"},"content":"On Mon, Oct 30, 2017 at 04:12:13PM +0000, Alex Bennée wrote:\n> \n> Dave Martin writes:\n> \n> > On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:\n> >>\n> >> Dave Martin writes:\n> >>\n> >> > This patch adds two arm64-specific prctls, to permit userspace to\n> >> > control its vector length:\n> >> >\n> >> > * PR_SVE_SET_VL: set the thread's SVE vector length and vector\n> >> > length inheritance mode.\n> >> >\n> >> > * PR_SVE_GET_VL: get the same information.\n> >> >\n> >> > Although these prctls resemble instruction set features in the SVE\n> >> > architecture, they provide additional control: the vector length\n> >> > inheritance mode is Linux-specific and nothing to do with the\n> >> > architecture, and the architecture does not permit EL0 to set its\n> >> > own vector length directly. Both can be used in portable tools\n> >> > without requiring the use of SVE instructions.\n> >> >\n> >> > Signed-off-by: Dave Martin \n> >> > Reviewed-by: Catalin Marinas \n> >> > Cc: Alex Bennée \n> >>\n> >> FYI there is a minor conflict applying this on current master.\n> >\n> > There are some trivial conflicts with one or two patches that already\n> > went into arm64/for-next/core, so I based on that for this posting, not\n> > torvalds/master.\n> >\n> > There's a note in the cover letter giving the precise commit I based\n> > on, though the branch doesn't seem to have moved yet since I posted.\n> \n> Ahh probably those. It was only a few header file shuffles. I was\n> rushing to apply before my flight back I failed to note the change in\n> base commit.\n> \n> >\n> > Otherwise, I don't see any conflict -- can you give details?\n> \n> Only that #endif _ASM_ had been dropped from the header file.\n\nThe #ifndef __ASSEMBLY__ ... #endif is added by another in-flight patch,\nso it depends on whether that patch (from arm64/for-next/core) is already\napplied.\n\nCheers\n---Dave","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-86546-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"IGasPSPy\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yQflP6h6hz9s7F\n\tfor ;\n\tTue, 31 Oct 2017 03:17:37 +1100 (AEDT)","(qmail 129745 invoked by alias); 30 Oct 2017 16:17:30 -0000","(qmail 128877 invoked by uid 89); 30 Oct 2017 16:17:30 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=DZvp7WfP/NKnlD5EkISvvc03MfkN2R\n\t+3j0jQvwwoXJzd2LIQFdRlDGQ8HtdBMQasjs24Xt9/xx8H+fFJMrwjgX4bLuVrE8\n\tRSLM/a84iHDInIwX0pAwCezFmCRemHCz9gpM6QMmHh1Hb1olF2FRbs8LXlAIi+D9\n\tIfpzq2p9IfsFE=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=Diq3fm/MKNe3xlg1dTk6Hbcp/KY=; b=IGas\n\tPSPyCQtMUs42RfEmd2m/3NR6zq/pELM1Efhfo0oH9GouprQ2BQ0lf54PMKVYJXkM\n\tiNdAJjbqOt79V/M5otXV7i1QKMFaa3AMpKcP0FMlRuoErMbb5WRlav0WiIg/VE+a\n\twIW17reVT2e8zckyHT8fV2v3GpRY+iR27XVy5t8=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=flight, rushing,\n\tdropped, ahh","X-HELO":"foss.arm.com","Date":"Mon, 30 Oct 2017 16:17:22 +0000","From":"Dave Martin ","To":"Alex =?iso-8859-1?q?Benn=E9e?= ","Cc":"linux-arch@vger.kernel.org, Okamoto Takayuki , \n\tlibc-alpha@sourceware.org, Ard Biesheuvel ,\n\tSzabolcs Nagy ,\n\tCatalin Marinas ,\n\tWill Deacon , kvmarm@lists.cs.columbia.edu,\n\tlinux-arm-kernel@lists.infradead.org","Subject":"Re: [PATCH v4 20/28] arm64/sve: Add prctl controls for userspace\n\tvector length management","Message-ID":"<20171030161709.GJ19485@e103592.cambridge.arm.com>","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>\n\t<1509101470-7881-21-git-send-email-Dave.Martin@arm.com>\n\t<87r2toiikt.fsf@linaro.org>\n\t<20171028160506.GI19485@e103592.cambridge.arm.com>\n\t<87fua07gyq.fsf@linaro.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<87fua07gyq.fsf@linaro.org>","User-Agent":"Mutt/1.5.23 (2014-03-12)"}}]