[{"id":1794832,"web_url":"http://patchwork.ozlabs.org/comment/1794832/","msgid":"<20171027125450.zvksms255zs5oqtj@armageddon.cambridge.arm.com>","list_archive_url":null,"date":"2017-10-27T12:54:51","subject":"Re: [PATCH v4 13/28] arm64/sve: Signal handling support","submitter":{"id":938,"url":"http://patchwork.ozlabs.org/api/people/938/","name":"Catalin Marinas","email":"catalin.marinas@arm.com"},"content":"On Fri, Oct 27, 2017 at 11:50:55AM +0100, Dave P Martin wrote:\n> This patch implements support for saving and restoring the SVE\n> registers around signals.\n> \n> A fixed-size header struct sve_context is always included in the\n> signal frame encoding the thread's vector length at the time of\n> signal delivery, optionally followed by a variable-layout structure\n> encoding the SVE registers.\n> \n> Because of the need to preserve backwards compatibility, the FPSIMD\n> view of the SVE registers is always dumped as a struct\n> fpsimd_context in the usual way, in addition to any sve_context.\n> \n> The SVE vector registers are dumped in full, including bits 127:0\n> of each register which alias the corresponding FPSIMD vector\n> registers in the hardware. To avoid any ambiguity about which\n> alias to restore during sigreturn, the kernel always restores bits\n> 127:0 of each SVE vector register from the fpsimd_context in the\n> signal frame (which must be present): userspace needs to take this\n> into account if it wants to modify the SVE vector register contents\n> on return from a signal.\n> \n> FPSR and FPCR, which are used by both FPSIMD and SVE, are not\n> included in sve_context because they are always present in\n> fpsimd_context anyway.\n> \n> For signal delivery, a new helper\n> fpsimd_signal_preserve_current_state() is added to update _both_\n> the FPSIMD and SVE views in the task struct, to make it easier to\n> populate this information into the signal frame. Because of the\n> redundancy between the two views of the state, only one is updated\n> otherwise.\n> \n> Signed-off-by: Dave Martin \n> Cc: Alex Bennée \n> Cc: Ard Biesheuvel \n\nReviewed-by: Catalin Marinas ","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list libc-alpha@sourceware.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=sourceware.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=libc-alpha-return-86472-incoming=patchwork.ozlabs.org@sourceware.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tsecure) header.d=sourceware.org header.i=@sourceware.org\n\theader.b=\"J5CY/i8y\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3yNkP52BR2z9t2x\n\tfor ;\n\tFri, 27 Oct 2017 23:55:05 +1100 (AEDT)","(qmail 41602 invoked by alias); 27 Oct 2017 12:54:58 -0000","(qmail 41085 invoked by uid 89); 27 Oct 2017 12:54:58 -0000"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; q=dns; s=default; b=nI7+sOi18NhKXS+wCBEmyGytdVAAVH\n\tLaryMnK992A3ddyoj9OPUXfxfznsnv2vcxKh4MOlg2Pu93bmI5l6xgTe7LlvspOu\n\tysGn6VQlQ90IYPO7cWPYT9yGEiK6/i/Pn1mVjSUVvbjpOl+e02m+DHtsZ+7dB1Zn\n\t2nbXQU4PB2pRs=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id\n\t:list-unsubscribe:list-subscribe:list-archive:list-post\n\t:list-help:sender:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-type:content-transfer-encoding\n\t:in-reply-to; s=default; bh=hYR+GeIDPs7Bex8fy9kCEazsD1s=; b=J5CY\n\t/i8ydu+UJbYyBfQnOXY2ODh2ehLoYw6z/yVgUJuSBcihCowxvYO16S/x170Gfvl/\n\tyYr3Flq9Pu28MjsfW1ZmJABQrvjjGG93n5hkrcGYg2c36OOcnUE/ZdYBOaBzGdAJ\n\taGeKuWqNuL23VHrj6oC+nvOYU7x2Wd7dguxBZvU=","Mailing-List":"contact libc-alpha-help@sourceware.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Subscribe":"","List-Archive":"","List-Post":"","List-Help":",\n\t","Sender":"libc-alpha-owner@sourceware.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,\n\tRP_MATCHES_RCVD,\n\tSPF_PASS autolearn=ham version=3.3.2 spammy=Hx-languages-length:1817","X-HELO":"foss.arm.com","Date":"Fri, 27 Oct 2017 13:54:51 +0100","From":"Catalin Marinas ","To":"Dave Martin ","Cc":"linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,\n\tOkamoto Takayuki , \tlibc-alpha@sourceware.org,\n\tArd Biesheuvel , Szabolcs Nagy\n\t, \tWill Deacon , Alex\n\t=?iso-8859-1?q?Benn=E9e?= ,\n\tkvmarm@lists.cs.columbia.edu","Subject":"Re: [PATCH v4 13/28] arm64/sve: Signal handling support","Message-ID":"<20171027125450.zvksms255zs5oqtj@armageddon.cambridge.arm.com>","References":"<1509101470-7881-1-git-send-email-Dave.Martin@arm.com>\n\t<1509101470-7881-14-git-send-email-Dave.Martin@arm.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=iso-8859-1","Content-Disposition":"inline","Content-Transfer-Encoding":"8bit","In-Reply-To":"<1509101470-7881-14-git-send-email-Dave.Martin@arm.com>","User-Agent":"NeoMutt/20170113 (1.7.2)"}}]