[{"id":1777850,"web_url":"http://patchwork.ozlabs.org/comment/1777850/","msgid":"<8391dc88-36a1-0b3c-9ffa-42ce0238dc3f@gmail.com>","list_archive_url":null,"date":"2017-09-30T02:41:44","subject":"Re: [PATCH v3 1/6] gpu: host1x: Enable Tegra186 syncpoint protection","submitter":{"id":18124,"url":"http://patchwork.ozlabs.org/api/people/18124/","name":"Dmitry Osipenko","email":"digetx@gmail.com"},"content":"On 28.09.2017 15:50, Mikko Perttunen wrote:\n> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to\n> specific channels, preventing any other channels from incrementing\n> them.\n> \n> Enable this feature where available and assign syncpoints to channels\n> when submitting a job. Syncpoints are currently never unassigned from\n> channels since that would require extra work and is unnecessary with\n> the current channel allocation model.\n> \n> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n> ---\nReviewed-by: Dmitry Osipenko <digetx@gmail.com>\n\nOnly one minor comment below.\n\n>  drivers/gpu/host1x/dev.h           | 15 +++++++++++++\n>  drivers/gpu/host1x/hw/channel_hw.c |  3 +++\n>  drivers/gpu/host1x/hw/syncpt_hw.c  | 46 ++++++++++++++++++++++++++++++++++++++\n>  drivers/gpu/host1x/syncpt.c        |  8 +++++++\n>  4 files changed, 72 insertions(+)\n> \n> diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h\n> index def802c0a6bf..502769726480 100644\n> --- a/drivers/gpu/host1x/dev.h\n> +++ b/drivers/gpu/host1x/dev.h\n> @@ -79,6 +79,9 @@ struct host1x_syncpt_ops {\n>  \tu32 (*load)(struct host1x_syncpt *syncpt);\n>  \tint (*cpu_incr)(struct host1x_syncpt *syncpt);\n>  \tint (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr);\n> +\tvoid (*assign_to_channel)(struct host1x_syncpt *syncpt,\n> +\t                          struct host1x_channel *channel);\n> +\tvoid (*enable_protection)(struct host1x *host);\n>  };\n>  \n>  struct host1x_intr_ops {\n> @@ -186,6 +189,18 @@ static inline int host1x_hw_syncpt_patch_wait(struct host1x *host,\n>  \treturn host->syncpt_op->patch_wait(sp, patch_addr);\n>  }\n>  \n> +static inline void host1x_hw_syncpt_assign_to_channel(\n> +\tstruct host1x *host, struct host1x_syncpt *sp,\n> +\tstruct host1x_channel *ch)\n> +{\n> +\treturn host->syncpt_op->assign_to_channel(sp, ch);\n> +}\n> +\n> +static inline void host1x_hw_syncpt_enable_protection(struct host1x *host)\n> +{\n> +\treturn host->syncpt_op->enable_protection(host);\n> +}\n> +\n>  static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm,\n>  \t\t\tvoid (*syncpt_thresh_work)(struct work_struct *))\n>  {\n> diff --git a/drivers/gpu/host1x/hw/channel_hw.c b/drivers/gpu/host1x/hw/channel_hw.c\n> index 8447a56c41ca..b929d7f1e291 100644\n> --- a/drivers/gpu/host1x/hw/channel_hw.c\n> +++ b/drivers/gpu/host1x/hw/channel_hw.c\n> @@ -147,6 +147,9 @@ static int channel_submit(struct host1x_job *job)\n>  \n>  \tsyncval = host1x_syncpt_incr_max(sp, user_syncpt_incrs);\n>  \n> +\t/* assign syncpoint to channel */\n> +\thost1x_hw_syncpt_assign_to_channel(host, sp, ch);\n> +\n\nSince you've preserved the comment, what about to extend it with a brief\nexplanation of what actually the 'assignment' does? Like that CDMA will stop\nexecution on touching any syncpoint other then the assigned one.\n\n>  \tjob->syncpt_end = syncval;\n>  \n>  \t/* add a setclass for modules that require it */\n> diff --git a/drivers/gpu/host1x/hw/syncpt_hw.c b/drivers/gpu/host1x/hw/syncpt_hw.c\n> index 7b0270d60742..7dfd47d74f89 100644\n> --- a/drivers/gpu/host1x/hw/syncpt_hw.c\n> +++ b/drivers/gpu/host1x/hw/syncpt_hw.c\n> @@ -106,6 +106,50 @@ static int syncpt_patch_wait(struct host1x_syncpt *sp, void *patch_addr)\n>  \treturn 0;\n>  }\n>  \n> +/**\n> + * syncpt_assign_to_channel() - Assign syncpoint to channel\n> + * @sp: syncpoint\n> + * @ch: channel\n> + *\n> + * On chips with the syncpoint protection feature (Tegra186+), assign @sp to\n> + * @ch, preventing other channels from incrementing the syncpoints. If @ch is\n> + * NULL, unassigns the syncpoint.\n> + *\n> + * On older chips, do nothing.\n> + */\n> +static void syncpt_assign_to_channel(struct host1x_syncpt *sp,\n> +\t\t\t\t  struct host1x_channel *ch)\n> +{\n> +#if HOST1X_HW >= 6\n> +\tstruct host1x *host = sp->host;\n> +\n> +\tif (!host->hv_regs)\n> +\t\treturn;\n> +\n> +\thost1x_sync_writel(host,\n> +\t\t\t   HOST1X_SYNC_SYNCPT_CH_APP_CH(ch ? ch->id : 0xff),\n> +\t\t\t   HOST1X_SYNC_SYNCPT_CH_APP(sp->id));\n> +#endif\n> +}\n> +\n> +/**\n> + * syncpt_enable_protection() - Enable syncpoint protection\n> + * @host: host1x instance\n> + *\n> + * On chips with the syncpoint protection feature (Tegra186+), enable this\n> + * feature. On older chips, do nothing.\n> + */\n> +static void syncpt_enable_protection(struct host1x *host)\n> +{\n> +#if HOST1X_HW >= 6\n> +\tif (!host->hv_regs)\n> +\t\treturn;\n> +\n> +\thost1x_hypervisor_writel(host, HOST1X_HV_SYNCPT_PROT_EN_CH_EN,\n> +\t\t\t\t HOST1X_HV_SYNCPT_PROT_EN);\n> +#endif\n> +}\n> +\n>  static const struct host1x_syncpt_ops host1x_syncpt_ops = {\n>  \t.restore = syncpt_restore,\n>  \t.restore_wait_base = syncpt_restore_wait_base,\n> @@ -113,4 +157,6 @@ static const struct host1x_syncpt_ops host1x_syncpt_ops = {\n>  \t.load = syncpt_load,\n>  \t.cpu_incr = syncpt_cpu_incr,\n>  \t.patch_wait = syncpt_patch_wait,\n> +\t.assign_to_channel = syncpt_assign_to_channel,\n> +\t.enable_protection = syncpt_enable_protection,\n>  };\n> diff --git a/drivers/gpu/host1x/syncpt.c b/drivers/gpu/host1x/syncpt.c\n> index 048ac9e344ce..bce7cd6db724 100644\n> --- a/drivers/gpu/host1x/syncpt.c\n> +++ b/drivers/gpu/host1x/syncpt.c\n> @@ -398,6 +398,13 @@ int host1x_syncpt_init(struct host1x *host)\n>  \tfor (i = 0; i < host->info->nb_pts; i++) {\n>  \t\tsyncpt[i].id = i;\n>  \t\tsyncpt[i].host = host;\n> +\n> +\t\t/*\n> +\t\t * Unassign syncpt from channels for purposes of Tegra186\n> +\t\t * syncpoint protection. This prevents any channel from\n> +\t\t * accessing it until it is reassigned.\n> +\t\t */\n> +\t\thost1x_hw_syncpt_assign_to_channel(host, &syncpt[i], NULL);\n>  \t}\n>  \n>  \tfor (i = 0; i < host->info->nb_bases; i++)\n> @@ -408,6 +415,7 @@ int host1x_syncpt_init(struct host1x *host)\n>  \thost->bases = bases;\n>  \n>  \thost1x_syncpt_restore(host);\n> +\thost1x_hw_syncpt_enable_protection(host);\n>  \n>  \t/* Allocate sync point to use for clearing waits for expired fences */\n>  \thost->nop_sp = host1x_syncpt_alloc(host, NULL, 0);\n> \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-tegra\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<linux-tegra-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170928125044.32516-2-mperttunen@nvidia.com>","Content-Type":"text/plain; charset=utf-8","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-tegra.vger.kernel.org>","X-Mailing-List":"linux-tegra@vger.kernel.org"}},{"id":1777886,"web_url":"http://patchwork.ozlabs.org/comment/1777886/","msgid":"<7f1764a7-c41c-3c56-5c7f-5506e6a9fc01@kapsi.fi>","list_archive_url":null,"date":"2017-09-30T07:01:51","subject":"Re: [PATCH v3 1/6] gpu: host1x: Enable Tegra186 syncpoint protection","submitter":{"id":64745,"url":"http://patchwork.ozlabs.org/api/people/64745/","name":"Mikko Perttunen","email":"cyndis@kapsi.fi"},"content":"On 09/30/2017 05:41 AM, Dmitry Osipenko wrote:\n> On 28.09.2017 15:50, Mikko Perttunen wrote:\n>> ..\n>> diff --git a/drivers/gpu/host1x/hw/channel_hw.c b/drivers/gpu/host1x/hw/channel_hw.c\n>> index 8447a56c41ca..b929d7f1e291 100644\n>> --- a/drivers/gpu/host1x/hw/channel_hw.c\n>> +++ b/drivers/gpu/host1x/hw/channel_hw.c\n>> @@ -147,6 +147,9 @@ static int channel_submit(struct host1x_job *job)\n>>   \n>>   \tsyncval = host1x_syncpt_incr_max(sp, user_syncpt_incrs);\n>>   \n>> +\t/* assign syncpoint to channel */\n>> +\thost1x_hw_syncpt_assign_to_channel(host, sp, ch);\n>> +\n> \n> Since you've preserved the comment, what about to extend it with a brief\n> explanation of what actually the 'assignment' does? Like that CDMA will stop\n> execution on touching any syncpoint other then the assigned one.\n\nWhoops, I actually forgot to remove that :) I think the best would be to \nremove the comment here and have a more proper description of the \nfeature somewhere else.\n\nMikko\n--\nTo unsubscribe from this list: send the line \"unsubscribe linux-tegra\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<linux-tegra-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tsecure) header.d=kapsi.fi header.i=@kapsi.fi header.b=\"n0nTRdd8\";\n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y3zr26xr8z9t2Z\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 30 Sep 2017 17:01:54 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751178AbdI3HBx (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tSat, 30 Sep 2017 03:01:53 -0400","from mail.kapsi.fi ([91.232.154.25]:35441 \"EHLO mail.kapsi.fi\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1750944AbdI3HBx (ORCPT <rfc822;linux-tegra@vger.kernel.org>);\n\tSat, 30 Sep 2017 03:01:53 -0400","from dsl-hkibng22-54f983-249.dhcp.inet.fi ([84.249.131.249])\n\tby mail.kapsi.fi with esmtpsa\n\t(TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84_2)\n\t(envelope-from <cyndis@kapsi.fi>)\n\tid 1dyBmZ-0003kV-Ae; Sat, 30 Sep 2017 10:01:51 +0300"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kapsi.fi;\n\ts=20161220; \n\th=Content-Transfer-Encoding:Content-Type:In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject;\n\tbh=TLgsPABVLlM6ozoQYeN6aoWwGLGNHI5QMREogeDV0LY=; \n\tb=n0nTRdd8qCSc832Z90RU1DCT5ODvAJgtvBhxzlAu03G7tXX0/FomJyMgsj7udOo0OV+nkZ5c+LQrPZUzoKqL+l2rrTm82xYYIk4+QuGbRDDMPF2DAsJ1eKH/eyTkQVgJz+S64i+UXf0xhiH+wGIGQ61F1n5knkGnZ7HJWU5UJdj3NyuToCTN8bHY1HV247PnDjcB7MC+YCdbBGZTYHOrYY9TRbJQvBD1BBd2TEPosS5crZmF6EAN7xTce0CGF4gZQzrtWyQ24XL5ijTOS/LJea0gspczFtR5KzC1Hdz+iIg2q+fSaLrAerWb6dOcki2+3bMhINL9PCvEj3vj79sv0Q==;","Subject":"Re: [PATCH v3 1/6] gpu: host1x: Enable Tegra186 syncpoint protection","To":"Dmitry Osipenko <digetx@gmail.com>,\n\tMikko Perttunen <mperttunen@nvidia.com>,\n\tthierry.reding@gmail.com, jonathanh@nvidia.com","Cc":"dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","References":"<20170928125044.32516-1-mperttunen@nvidia.com>\n\t<20170928125044.32516-2-mperttunen@nvidia.com>\n\t<8391dc88-36a1-0b3c-9ffa-42ce0238dc3f@gmail.com>","From":"Mikko Perttunen <cyndis@kapsi.fi>","Message-ID":"<7f1764a7-c41c-3c56-5c7f-5506e6a9fc01@kapsi.fi>","Date":"Sat, 30 Sep 2017 10:01:51 +0300","User-Agent":"Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101\n\tThunderbird/52.2.1","MIME-Version":"1.0","In-Reply-To":"<8391dc88-36a1-0b3c-9ffa-42ce0238dc3f@gmail.com>","Content-Type":"text/plain; charset=utf-8; format=flowed","Content-Language":"en-US","Content-Transfer-Encoding":"7bit","X-SA-Exim-Connect-IP":"84.249.131.249","X-SA-Exim-Mail-From":"cyndis@kapsi.fi","X-SA-Exim-Scanned":"No (on mail.kapsi.fi); SAEximRunCond expanded to false","Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-tegra.vger.kernel.org>","X-Mailing-List":"linux-tegra@vger.kernel.org"}},{"id":1790526,"web_url":"http://patchwork.ozlabs.org/comment/1790526/","msgid":"<20171019124951.GS9005@ulmo>","list_archive_url":null,"date":"2017-10-19T12:49:51","subject":"Re: [PATCH v3 1/6] gpu: host1x: Enable Tegra186 syncpoint protection","submitter":{"id":26234,"url":"http://patchwork.ozlabs.org/api/people/26234/","name":"Thierry Reding","email":"thierry.reding@gmail.com"},"content":"On Thu, Sep 28, 2017 at 03:50:39PM +0300, Mikko Perttunen wrote:\n> Since Tegra186 the Host1x hardware allows syncpoints to be assigned to\n> specific channels, preventing any other channels from incrementing\n> them.\n> \n> Enable this feature where available and assign syncpoints to channels\n> when submitting a job. Syncpoints are currently never unassigned from\n> channels since that would require extra work and is unnecessary with\n> the current channel allocation model.\n> \n> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n> ---\n>  drivers/gpu/host1x/dev.h           | 15 +++++++++++++\n>  drivers/gpu/host1x/hw/channel_hw.c |  3 +++\n>  drivers/gpu/host1x/hw/syncpt_hw.c  | 46 ++++++++++++++++++++++++++++++++++++++\n>  drivers/gpu/host1x/syncpt.c        |  8 +++++++\n>  4 files changed, 72 insertions(+)\n\nApplied all of these, thanks.\n\nThierry","headers":{"Return-Path":"<linux-tegra-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"CXrgEnyo\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3yHpfs2np9z9t3f\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 19 Oct 2017 23:49:57 +1100 (AEDT)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1752699AbdJSMt4 (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tThu, 19 Oct 2017 08:49:56 -0400","from mail-qt0-f180.google.com ([209.85.216.180]:54345 \"EHLO\n\tmail-qt0-f180.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1752277AbdJSMtz (ORCPT\n\t<rfc822;linux-tegra@vger.kernel.org>);\n\tThu, 19 Oct 2017 08:49:55 -0400","by mail-qt0-f180.google.com with SMTP id z19so14215229qtg.11;\n\tThu, 19 Oct 2017 05:49:55 -0700 (PDT)","from localhost\n\t(p200300E41BE4FD00CEAD5B94E1CFD280.dip0.t-ipconnect.de.\n\t[2003:e4:1be4:fd00:cead:5b94:e1cf:d280])\n\tby smtp.gmail.com with ESMTPSA id\n\tt18sm9566704qtc.58.2017.10.19.05.49.53\n\t(version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256);\n\tThu, 19 Oct 2017 05:49:53 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=date:from:to:cc:subject:message-id:references:mime-version\n\t:content-disposition:in-reply-to:user-agent;\n\tbh=O61wlbita63V56lkkRfau8BQ0/d6Q8BR/leczhi/fPc=;\n\tb=CXrgEnyoCnjG2Kgrg4MRKLlFe1eFpu9O8bVmgx8XiXCZdZWdfclUkE2zW83x5P1AxW\n\tCKQ4xk9Blqh6TXaTweg6XWEJkK6h+MZOgCI7u7kcNN5H2y6Lt9TacbdP5VL0mLQuRsM7\n\thdxaN6NCMcsdURMtZLjwAtgyGdcoKV+dO2ULjG5kXhb7OXuEKpnBeX89v1Ss1CFtRKwN\n\tuot33yT5zJo5vBXd30FlXuV1IugjgBicS/Z/eGfNKFfzEgt+W80woOBFSRzJ3zr81Gdi\n\tbGs945vVgmrTidbW7U7y8yN/FLZEUzSSmFj5/tC/pOW5jnORx0WL8T15uehVmHyC+npj\n\tbM6g==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:date:from:to:cc:subject:message-id:references\n\t:mime-version:content-disposition:in-reply-to:user-agent;\n\tbh=O61wlbita63V56lkkRfau8BQ0/d6Q8BR/leczhi/fPc=;\n\tb=HBCOaADzxUqP6wHcMzWKDbAI/83Zc8WFI8QNYNfUhyEKun26N5twMND2SITxkTWZcJ\n\tdd6le8QBQPfOn9S2cbKvXEzoF9FM/2bkOesCkt7TNktLaZ9kzgzzet5atR6YvjVs7b7+\n\tjnKcsK3ZH57V1IcSKmkoqfJtlajBIkQY53JgIVacNfv0/sLbgST121aBhxPW95mUzHT+\n\ty14nTfpwkJjGIZ1QEdpAEj+PYytDBtXaiOKBmclugCFIcTmbYQbi6Gjybk60SJArzb1N\n\tOuXy1rY9l4Y9bOyAuL8bCO0BIx/yUCwq+CnXfx9UNJ16odbPqm33mMr3q6dVRJ0LKJZA\n\t1UiQ==","X-Gm-Message-State":"AMCzsaXXmeGUXi1bvzArbCP21hI5SQygx9xBCZVlXWy/odU819a4neNy\n\t5WG3g5R5Bv1vowBBiXvymAc=","X-Google-Smtp-Source":"ABhQp+Q/ORpDehUGEMYBVv4HY7ayJ2butpzFawk8wt+pTB1Kb26160jGVneFYOFm5Nkw1VjvWAyy6Q==","X-Received":"by 10.200.52.156 with SMTP id w28mr1733047qtb.116.1508417394550; \n\tThu, 19 Oct 2017 05:49:54 -0700 (PDT)","Date":"Thu, 19 Oct 2017 14:49:51 +0200","From":"Thierry Reding <thierry.reding@gmail.com>","To":"Mikko Perttunen <mperttunen@nvidia.com>","Cc":"jonathanh@nvidia.com, digetx@gmail.com,\n\tdri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"Re: [PATCH v3 1/6] gpu: host1x: Enable Tegra186 syncpoint protection","Message-ID":"<20171019124951.GS9005@ulmo>","References":"<20170928125044.32516-1-mperttunen@nvidia.com>\n\t<20170928125044.32516-2-mperttunen@nvidia.com>","MIME-Version":"1.0","Content-Type":"multipart/signed; micalg=pgp-sha256;\n\tprotocol=\"application/pgp-signature\"; boundary=\"NAmHCRPXNp23hR9r\"","Content-Disposition":"inline","In-Reply-To":"<20170928125044.32516-2-mperttunen@nvidia.com>","User-Agent":"Mutt/1.9.1 (2017-09-22)","Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-tegra.vger.kernel.org>","X-Mailing-List":"linux-tegra@vger.kernel.org"}}]