[{"id":1777217,"web_url":"http://patchwork.ozlabs.org/comment/1777217/","msgid":"<CAFd5g46LrdCkPq-dZyrA3Nnw28=r-sCsPvp5bWngYUF=3RmDYA@mail.gmail.com>","list_archive_url":null,"date":"2017-09-28T18:35:33","subject":"Re: [PATCH 3/8] ARM: dts: aspeed: Add I2C buses","submitter":{"id":69647,"url":"http://patchwork.ozlabs.org/api/people/69647/","name":"Brendan Higgins","email":"brendanhiggins@google.com"},"content":"On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley <joel@jms.id.au> wrote:\n> Now with an upstream i2c bus driver, we can add  the 14 i2c buses that\n> exist in ASPEED G4 and G5 generation SoCs.\n>\n> It also adds aliases for the 14 built-in I2C busses to ensure userspace\n> sees the numbering staring from zero and counting up.\n>\n> Signed-off-by: Joel Stanley <joel@jms.id.au>\n> ---\n\nReviewed-by: Brendan Higgins <brendanhiggins@google.com>\n\nnit: can we make the i2c labels and the pinctrl labels match?\n\nFor example:\n\n> +\n> +       i2c13: i2c-bus@480 {\n> +               #address-cells = <1>;\n> +               #size-cells = <0>;\n> +               #interrupt-cells = <1>;\n> +\n> +               reg = <0x480 0x40>;\n> +               compatible = \"aspeed,ast2500-i2c-bus\";\n> +               clocks = <&clk_apb>;\n> +               bus-frequency = <100000>;\n> +               interrupts = <13>;\n> +               interrupt-parent = <&i2c_ic>;\n> +               pinctrl-names = \"default\";\n> +               pinctrl-0 = <&pinctrl_i2c14_default>;\n> +               status = \"disabled\";\n> +       };\n\n\"i2c13\" has a pinctrl-0 of \"pinctrl_i2c14_default\"\n\nI know that pinctrl_i2c14_default is consistent with the function and\ngroups it uses, but I would like to see them all be consistent at some\npoint in the future.","headers":{"Return-Path":"<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y33KT29Tcz9tX5\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 29 Sep 2017 04:35:41 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y33KS6LvvzDsPq\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 29 Sep 2017 04:35:40 +1000 (AEST)","from mail-qk0-x236.google.com (mail-qk0-x236.google.com\n\t[IPv6:2607:f8b0:400d:c09::236])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y33KP1mhRzDsPq\n\tfor <linux-aspeed@lists.ozlabs.org>;\n\tFri, 29 Sep 2017 04:35:36 +1000 (AEST)","by mail-qk0-x236.google.com with SMTP id b23so2339285qkg.1\n\tfor <linux-aspeed@lists.ozlabs.org>;\n\tThu, 28 Sep 2017 11:35:36 -0700 (PDT)","by 10.140.82.175 with HTTP; Thu, 28 Sep 2017 11:35:33 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=google.com header.i=@google.com\n\theader.b=\"F85nZ9vE\"; dkim-atps=neutral","lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=google.com header.i=@google.com\n\theader.b=\"F85nZ9vE\"; dkim-atps=neutral","ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=google.com\n\t(client-ip=2607:f8b0:400d:c09::236; helo=mail-qk0-x236.google.com;\n\tenvelope-from=brendanhiggins@google.com; receiver=<UNKNOWN>)","lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=google.com header.i=@google.com\n\theader.b=\"F85nZ9vE\"; dkim-atps=neutral"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;\n\ts=20161025; \n\th=mime-version:in-reply-to:references:from:date:message-id:subject:to\n\t:cc; bh=YNXWewpXfluE9QM72rm38wuy6AT1N+EsQ1eHfZ2SqMk=;\n\tb=F85nZ9vEN5kt7R4+1VJJghtTU1O7u3B5ix+uOcOI2F05xm7IP4gltwoXP4tkhmwjEC\n\tbSNk+6ZAL0ykDysMvaQ6lzhRjdUgRxF4QndrADhj3PN0ekYsmugfXa4jSMOJiRqCMMPI\n\tutTXco5VZfbzL5tO1QipYR4uVcgUYo5u9+0r/aVXMV1tF4fuBFYZ55dOwfBPmZ50xtHN\n\tTXEXpYS4biO0Ewuc/zbvKtPNcIJnSNeQeAeNj8vpJ4uON+PdT8qMoAFF7wX0kICCT8De\n\tFoIi/SydTkRC0TsptyBCt6gpfxeqZ7fLmReLwb/dW1xpeiCwuXyoFKrOWicHzd+5a+XP\n\t3SIg==","X-Google-DKIM-Signature":"v=1; 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charset=\"UTF-8\"","X-BeenThere":"linux-aspeed@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux ASPEED SoC development <linux-aspeed.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/linux-aspeed>,\n\t<mailto:linux-aspeed-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/linux-aspeed/>","List-Post":"<mailto:linux-aspeed@lists.ozlabs.org>","List-Help":"<mailto:linux-aspeed-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/linux-aspeed>,\n\t<mailto:linux-aspeed-request@lists.ozlabs.org?subject=subscribe>","Cc":"Mark Rutland <mark.rutland@arm.com>,\n\tdevicetree <devicetree@vger.kernel.org>, linux-aspeed@lists.ozlabs.org,\n\tRussell King <linux@armlinux.org.uk>,\n\tLinux Kernel Mailing List <linux-kernel@vger.kernel.org>,\n\tRob Herring <robh+dt@kernel.org>, Rick Altherr <raltherr@google.com>, \n\tlinux-arm-kernel@lists.infradead.org","Errors-To":"linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"Linux-aspeed\"\n\t<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>"}},{"id":1779404,"web_url":"http://patchwork.ozlabs.org/comment/1779404/","msgid":"<1507091793.5452.10.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T04:36:33","subject":"Re: [PATCH 3/8] ARM: dts: aspeed: Add I2C buses","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 11:35 -0700, Brendan Higgins wrote:\n> > On Thu, Sep 28, 2017 at 12:51 AM, Joel Stanley <joel@jms.id.au> wrote:\n> > Now with an upstream i2c bus driver, we can add  the 14 i2c buses that\n> > exist in ASPEED G4 and G5 generation SoCs.\n> > \n> > It also adds aliases for the 14 built-in I2C busses to ensure userspace\n> > sees the numbering staring from zero and counting up.\n> > \n> > Signed-off-by: Joel Stanley <joel@jms.id.au>\n> > ---\n> \n> > Reviewed-by: Brendan Higgins <brendanhiggins@google.com>\n> \n> nit: can we make the i2c labels and the pinctrl labels match?\n> \n> For example:\n> \n> > +\n> > +       i2c13: i2c-bus@480 {\n> > +               #address-cells = <1>;\n> > +               #size-cells = <0>;\n> > +               #interrupt-cells = <1>;\n> > +\n> > +               reg = <0x480 0x40>;\n> > +               compatible = \"aspeed,ast2500-i2c-bus\";\n> > +               clocks = <&clk_apb>;\n> > +               bus-frequency = <100000>;\n> > +               interrupts = <13>;\n> > +               interrupt-parent = <&i2c_ic>;\n> > +               pinctrl-names = \"default\";\n> > +               pinctrl-0 = <&pinctrl_i2c14_default>;\n> > +               status = \"disabled\";\n> > +       };\n> \n> \"i2c13\" has a pinctrl-0 of \"pinctrl_i2c14_default\"\n> \n> I know that pinctrl_i2c14_default is consistent with the function and\n> groups it uses, but I would like to see them all be consistent at some\n> point in the future.\n\nI doubt we'll be making them consistent: How the i2c devices are aliased by\nLinux are independent of how they're labelled in hardware or the datasheet.\n\nFor sanity's sake pinmux's functions and groups follow the datasheet (though if\nyou want to maintain the Aspeed pinctrl drivers, be my guest :D)\n\nWe could rename the pinmux nodes to offset them from the function and group,\nbut it feels less self-contained if the nodes are named at the whim of the\ndevice requesting the function if there's no further configuration on top of\nthe function and group*. It also makes it harder to auto-explode the function\nname into the node definitions as we'd then need some further mangling to make\nthings line up.\n\n* The pinctrl devicetree bindings allow for definition of nested nodes to\nspecify collections and combinations of pin function and group, and pin\nconfiguration such as drive-strength. Thus the nodes can be a lot more complex\nthan what we've defined up until now, but what we've got enables a lot of\npretty straight-forward uses-cases.\n\nWe could alias the i2c devices in line with the hardware, but that breaks the\nconvention of starting device numbering at 0.\n\nUltimately Joel and I chose to make the break at the point where the i2c device\nrequests the mux function. It's up to the device to know what hardware mux\nconfiguration it needs and that's what this approach documents. The\ninconsistency is irritating but I don't feel like it's the end of the world,\nand I think the alternatives are (slightly) worse.\n\nCheers,\n\nAndrew","headers":{"Return-Path":"<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y6NQq1ZJ9z9s7g\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed,  4 Oct 2017 15:36:51 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y6NQp6MDdzDqln\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed,  4 Oct 2017 15:36:50 +1100 (AEDT)","from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com\n\t[66.111.4.25])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y6NQk3tWDzDqln\n\tfor <linux-aspeed@lists.ozlabs.org>;\n\tWed,  4 Oct 2017 15:36:45 +1100 (AEDT)","from compute4.internal (compute4.nyi.internal [10.202.2.44])\n\tby mailout.nyi.internal (Postfix) with ESMTP id 7192B21069;\n\tWed,  4 Oct 2017 00:36:42 -0400 (EDT)","from frontend2 ([10.202.2.161])\n\tby compute4.internal (MEProxy); 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micalg=\"pgp-sha512\";\n\tprotocol=\"application/pgp-signature\";\n\tboundary=\"=-wN7roEnls3pshcsqkUzh\"","X-Mailer":"Evolution 3.22.6-1ubuntu1 ","Mime-Version":"1.0","X-BeenThere":"linux-aspeed@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux ASPEED SoC development <linux-aspeed.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/linux-aspeed>,\n\t<mailto:linux-aspeed-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/linux-aspeed/>","List-Post":"<mailto:linux-aspeed@lists.ozlabs.org>","List-Help":"<mailto:linux-aspeed-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/linux-aspeed>,\n\t<mailto:linux-aspeed-request@lists.ozlabs.org?subject=subscribe>","Cc":"Mark Rutland <mark.rutland@arm.com>,\n\tdevicetree <devicetree@vger.kernel.org>, linux-aspeed@lists.ozlabs.org,\n\tRussell King <linux@armlinux.org.uk>,\n\tLinux Kernel Mailing List <linux-kernel@vger.kernel.org>,\n\tRob Herring <robh+dt@kernel.org>, Rick Altherr <raltherr@google.com>, \n\tlinux-arm-kernel@lists.infradead.org","Errors-To":"linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"Linux-aspeed\"\n\t<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>"}},{"id":1779411,"web_url":"http://patchwork.ozlabs.org/comment/1779411/","msgid":"<1507092110.5452.11.camel@aj.id.au>","list_archive_url":null,"date":"2017-10-04T04:41:50","subject":"Re: [PATCH 3/8] ARM: dts: aspeed: Add I2C buses","submitter":{"id":68332,"url":"http://patchwork.ozlabs.org/api/people/68332/","name":"Andrew Jeffery","email":"andrew@aj.id.au"},"content":"On Thu, 2017-09-28 at 17:21 +0930, Joel Stanley wrote:\n> Now with an upstream i2c bus driver, we can add  the 14 i2c buses that\n> exist in ASPEED G4 and G5 generation SoCs.\n> \n> It also adds aliases for the 14 built-in I2C busses to ensure userspace\n> sees the numbering staring from zero and counting up.\n> \n> Signed-off-by: Joel Stanley <joel@jms.id.au>\n\nAcked-by: Andrew Jeffery <andrew@aj.id.au>","headers":{"Return-Path":"<linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y6NXr2GLmz9t16\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed,  4 Oct 2017 15:42:04 +1100 (AEDT)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3y6NXr07ltzDqks\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed,  4 Oct 2017 15:42:04 +1100 (AEDT)","from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com\n\t[66.111.4.25])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3y6NXm2LDqzDqks\n\tfor <linux-aspeed@lists.ozlabs.org>;\n\tWed,  4 Oct 2017 15:42:00 +1100 (AEDT)","from compute4.internal (compute4.nyi.internal [10.202.2.44])\n\tby mailout.nyi.internal (Postfix) with ESMTP id 19A4820C69;\n\tWed,  4 Oct 2017 00:41:58 -0400 (EDT)","from frontend2 ([10.202.2.161])\n\tby compute4.internal (MEProxy); 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